blob: 95d10aa6d324fa37266f5e8c562d6ca2cd37e1ae [file] [log] [blame]
developera37ad462018-11-15 10:07:50 +08001/*
2 * Copyright (C) 2018 MediaTek Inc.
3 * Author: Ryder Lee <ryder.lee@mediatek.com>
4 *
5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 */
7
8/dts-v1/;
9#include "mt7629.dtsi"
10
11/ {
12 model = "MediaTek MT7629 RFB";
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
14
15 aliases {
16 spi0 = &qspi;
17 };
18
19 chosen {
20 stdout-path = &uart0;
21 tick-timer = &timer0;
22 };
23};
24
developere43f3c72018-12-20 16:12:55 +080025&eth {
26 status = "okay";
27 mediatek,gmac-id = <1>;
28 phy-mode = "gmii";
29 phy-handle = <&phy0>;
30
31 phy0: ethernet-phy@0 {
32 reg = <0>;
33 };
34};
35
developera37ad462018-11-15 10:07:50 +080036&pinctrl {
37 qspi_pins: qspi-pins {
38 mux {
39 function = "flash";
40 groups = "spi_nor";
41 };
42 };
43
44 uart0_pins: uart0-default {
45 mux {
46 function = "uart";
47 groups = "uart0_txd_rxd";
48 };
49 };
50
51 watchdog_pins: watchdog-default {
52 mux {
53 function = "watchdog";
54 groups = "watchdog";
55 };
56 };
57};
58
59&qspi {
60 pinctrl-names = "default";
61 pinctrl-0 = <&qspi_pins>;
62 status = "okay";
63
64 spi-flash@0{
65 compatible = "spi-flash";
66 reg = <0>;
67 u-boot,dm-pre-reloc;
68 };
69};
70
71&uart0 {
72 pinctrl-names = "default";
73 pinctrl-0 = <&uart0_pins>;
74 status = "okay";
75};
76
77&watchdog {
78 pinctrl-names = "default";
79 pinctrl-0 = <&watchdog_pins>;
80 status = "okay";
81};