| Peng Fan | b15705a | 2021-08-07 16:00:35 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright 2020 NXP |
| 4 | */ |
| 5 | |
| 6 | #ifndef __ASM_ARCH_IMX8ULP_DDR_H |
| 7 | #define __ASM_ARCH_IMX8ULP_DDR_H |
| 8 | |
| 9 | #include <asm/io.h> |
| 10 | #include <asm/types.h> |
| 11 | |
| 12 | struct dram_cfg_param { |
| 13 | unsigned int reg; |
| 14 | unsigned int val; |
| 15 | }; |
| 16 | |
| 17 | struct dram_timing_info2 { |
| 18 | /* ddr controller config */ |
| 19 | struct dram_cfg_param *ctl_cfg; |
| 20 | unsigned int ctl_cfg_num; |
| 21 | /* pi config */ |
| 22 | struct dram_cfg_param *pi_cfg; |
| 23 | unsigned int pi_cfg_num; |
| 24 | /* phy freq1 config */ |
| 25 | struct dram_cfg_param *phy_f1_cfg; |
| 26 | unsigned int phy_f1_cfg_num; |
| 27 | /* phy freq2 config */ |
| 28 | struct dram_cfg_param *phy_f2_cfg; |
| 29 | unsigned int phy_f2_cfg_num; |
| 30 | /* initialized drate table */ |
| 31 | unsigned int fsp_table[3]; |
| 32 | }; |
| 33 | |
| 34 | extern struct dram_timing_info2 dram_timing; |
| 35 | |
| 36 | int ddr_init(struct dram_timing_info2 *dram_timing); |
| 37 | |
| 38 | #endif |