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Heiko Schocher60301192010-02-22 16:43:02 +05301/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * (C) Copyright 2009
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
9 * (C) Copyright 2010
10 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28 * MA 02110-1301 USA
29 */
30
31#include <common.h>
32#include <i2c.h>
33#include <nand.h>
34#include <netdev.h>
35#include <miiphy.h>
Valentin Longchamp96957ef2012-06-13 03:01:03 +000036#include <spi.h>
Heiko Schocher60301192010-02-22 16:43:02 +053037#include <asm/io.h>
Lei Wen298ae912011-10-18 20:11:42 +053038#include <asm/arch/cpu.h>
Heiko Schocher60301192010-02-22 16:43:02 +053039#include <asm/arch/kirkwood.h>
40#include <asm/arch/mpp.h>
41
42#include "../common/common.h"
43
44DECLARE_GLOBAL_DATA_PTR;
45
Holger Brunck4de3cdd2011-05-31 02:12:52 +000046/*
47 * BOCO FPGA definitions
48 */
49#define BOCO 0x10
50#define REG_CTRL_H 0x02
51#define MASK_WRL_UNITRUN 0x01
52#define MASK_RBX_PGY_PRESENT 0x40
53#define REG_IRQ_CIRQ2 0x2d
54#define MASK_RBI_DEFECT_16 0x01
55
Heiko Schocher60301192010-02-22 16:43:02 +053056/* Multi-Purpose Pins Functionality configuration */
57u32 kwmpp_config[] = {
58 MPP0_NF_IO2,
59 MPP1_NF_IO3,
60 MPP2_NF_IO4,
61 MPP3_NF_IO5,
62 MPP4_NF_IO6,
63 MPP5_NF_IO7,
64 MPP6_SYSRST_OUTn,
65 MPP7_PEX_RST_OUTn,
66#if defined(CONFIG_SOFT_I2C)
67 MPP8_GPIO, /* SDA */
68 MPP9_GPIO, /* SCL */
69#endif
70#if defined(CONFIG_HARD_I2C)
71 MPP8_TW_SDA,
72 MPP9_TW_SCK,
73#endif
74 MPP10_UART0_TXD,
75 MPP11_UART0_RXD,
76 MPP12_GPO, /* Reserved */
77 MPP13_UART1_TXD,
78 MPP14_UART1_RXD,
79 MPP15_GPIO, /* Not used */
80 MPP16_GPIO, /* Not used */
81 MPP17_GPIO, /* Reserved */
82 MPP18_NF_IO0,
83 MPP19_NF_IO1,
84 MPP20_GPIO,
85 MPP21_GPIO,
86 MPP22_GPIO,
87 MPP23_GPIO,
88 MPP24_GPIO,
89 MPP25_GPIO,
90 MPP26_GPIO,
91 MPP27_GPIO,
92 MPP28_GPIO,
93 MPP29_GPIO,
94 MPP30_GPIO,
95 MPP31_GPIO,
96 MPP32_GPIO,
97 MPP33_GPIO,
98 MPP34_GPIO, /* CDL1 (input) */
99 MPP35_GPIO, /* CDL2 (input) */
100 MPP36_GPIO, /* MAIN_IRQ (input) */
101 MPP37_GPIO, /* BOARD_LED */
102 MPP38_GPIO, /* Piggy3 LED[1] */
103 MPP39_GPIO, /* Piggy3 LED[2] */
104 MPP40_GPIO, /* Piggy3 LED[3] */
105 MPP41_GPIO, /* Piggy3 LED[4] */
106 MPP42_GPIO, /* Piggy3 LED[5] */
107 MPP43_GPIO, /* Piggy3 LED[6] */
Heiko Schocher9878f992011-02-22 09:13:00 +0100108 MPP44_GPIO, /* Piggy3 LED[7], BIST_EN_L */
Heiko Schocher60301192010-02-22 16:43:02 +0530109 MPP45_GPIO, /* Piggy3 LED[8] */
110 MPP46_GPIO, /* Reserved */
111 MPP47_GPIO, /* Reserved */
112 MPP48_GPIO, /* Reserved */
113 MPP49_GPIO, /* SW_INTOUTn */
114 0
115};
116
Holger Brunckd896d0d2012-07-05 05:05:03 +0000117#if defined(CONFIG_KM_MGCOGE3UN)
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000118/*
119 * Wait for startup OK from mgcoge3ne
120 */
121int startup_allowed(void)
122{
123 unsigned char buf;
124
125 /*
126 * Read CIRQ16 bit (bit 0)
127 */
128 if (i2c_read(BOCO, REG_IRQ_CIRQ2, 1, &buf, 1) != 0)
129 printf("%s: Error reading Boco\n", __func__);
130 else
131 if ((buf & MASK_RBI_DEFECT_16) == MASK_RBI_DEFECT_16)
132 return 1;
133 return 0;
134}
Valentin Longchamp2ec63ad2011-06-16 18:11:15 +0530135#endif
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000136
Holger Brunckd896d0d2012-07-05 05:05:03 +0000137#if (defined(CONFIG_KM_PIGGY4_88E6061)|defined(CONFIG_KM_PIGGY4_88E6352))
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000138/*
Holger Brunck2ef42952012-07-05 05:37:46 +0000139 * All boards with PIGGY4 connected via a simple switch have ethernet always
140 * present.
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000141 */
142int ethernet_present(void)
143{
144 return 1;
145}
146#else
Heiko Schocher60301192010-02-22 16:43:02 +0530147int ethernet_present(void)
148{
149 uchar buf;
150 int ret = 0;
151
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000152 if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100153 printf("%s: Error reading Boco\n", __func__);
Heiko Schocher60301192010-02-22 16:43:02 +0530154 return -1;
155 }
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000156 if ((buf & MASK_RBX_PGY_PRESENT) == MASK_RBX_PGY_PRESENT)
Heiko Schocher60301192010-02-22 16:43:02 +0530157 ret = 1;
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100158
Heiko Schocher60301192010-02-22 16:43:02 +0530159 return ret;
160}
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000161#endif
Heiko Schocher60301192010-02-22 16:43:02 +0530162
Heiko Schochere4533af2011-03-08 10:53:51 +0100163int initialize_unit_leds(void)
164{
165 /*
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000166 * Init the unit LEDs per default they all are
Heiko Schochere4533af2011-03-08 10:53:51 +0100167 * ok apart from bootstat
Heiko Schochere4533af2011-03-08 10:53:51 +0100168 */
Heiko Schochere4533af2011-03-08 10:53:51 +0100169 uchar buf;
170
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000171 if (i2c_read(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
Heiko Schochere4533af2011-03-08 10:53:51 +0100172 printf("%s: Error reading Boco\n", __func__);
173 return -1;
174 }
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000175 buf |= MASK_WRL_UNITRUN;
176 if (i2c_write(BOCO, REG_CTRL_H, 1, &buf, 1) != 0) {
Heiko Schochere4533af2011-03-08 10:53:51 +0100177 printf("%s: Error writing Boco\n", __func__);
178 return -1;
179 }
180 return 0;
181}
182
Valentin Longchamp184907a2011-05-31 02:12:47 +0000183#if defined(CONFIG_BOOTCOUNT_LIMIT)
184void set_bootcount_addr(void)
185{
186 uchar buf[32];
187 unsigned int bootcountaddr;
188 bootcountaddr = gd->ram_size - BOOTCOUNT_ADDR;
189 sprintf((char *)buf, "0x%x", bootcountaddr);
190 setenv("bootcountaddr", (char *)buf);
191}
192#endif
193
Heiko Schocher60301192010-02-22 16:43:02 +0530194int misc_init_r(void)
195{
Heiko Schocher60301192010-02-22 16:43:02 +0530196 char *str;
197 int mach_type;
198
Heiko Schocher60301192010-02-22 16:43:02 +0530199 str = getenv("mach_type");
200 if (str != NULL) {
201 mach_type = simple_strtoul(str, NULL, 10);
202 printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
203 gd->bd->bi_arch_number = mach_type;
204 }
Holger Brunckd896d0d2012-07-05 05:05:03 +0000205#if defined(CONFIG_KM_MGCOGE3UN)
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000206 char *wait_for_ne;
207 wait_for_ne = getenv("waitforne");
208 if (wait_for_ne != NULL) {
209 if (strcmp(wait_for_ne, "true") == 0) {
210 int cnt = 0;
Holger Brunck42874a72011-09-27 02:54:31 +0000211 int abort = 0;
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000212 puts("NE go: ");
213 while (startup_allowed() == 0) {
Holger Brunck42874a72011-09-27 02:54:31 +0000214 if (tstc()) {
215 (void) getc(); /* consume input */
216 abort = 1;
217 break;
218 }
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000219 udelay(200000);
220 cnt++;
221 if (cnt == 5)
222 puts("wait\b\b\b\b");
223 if (cnt == 10) {
224 cnt = 0;
225 puts(" \b\b\b\b");
226 }
227 }
Holger Brunck42874a72011-09-27 02:54:31 +0000228 if (abort == 1)
229 printf("\nAbort waiting for ne\n");
230 else
231 puts("OK\n");
Holger Brunck4de3cdd2011-05-31 02:12:52 +0000232 }
233 }
234#endif
Heiko Schochere4533af2011-03-08 10:53:51 +0100235
236 initialize_unit_leds();
Valentin Longchamp184907a2011-05-31 02:12:47 +0000237 set_km_env();
238#if defined(CONFIG_BOOTCOUNT_LIMIT)
239 set_bootcount_addr();
240#endif
Heiko Schocher60301192010-02-22 16:43:02 +0530241 return 0;
242}
243
Heiko Schocher3ebd02b2010-10-20 19:33:26 +0530244int board_early_init_f(void)
Heiko Schocher60301192010-02-22 16:43:02 +0530245{
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000246#if defined(CONFIG_SOFT_I2C)
Heiko Schocher60301192010-02-22 16:43:02 +0530247 u32 tmp;
248
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000249 /* set the 2 bitbang i2c pins as output gpios */
250 tmp = readl(KW_GPIO0_BASE + 4);
251 writel(tmp & (~KM_KIRKWOOD_SOFT_I2C_GPIOS) , KW_GPIO0_BASE + 4);
252#endif
253
Valentin Longchamp7d0d5022012-06-01 01:31:00 +0000254 kirkwood_mpp_conf(kwmpp_config, NULL);
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000255 return 0;
256}
Heiko Schocher60301192010-02-22 16:43:02 +0530257
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000258int board_init(void)
259{
Heiko Schocher60301192010-02-22 16:43:02 +0530260 /*
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000261 * arch number of board
262 */
263 gd->bd->bi_arch_number = MACH_TYPE_KM_KIRKWOOD;
264
265 /* address of boot parameters */
266 gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
267
268 /*
269 * The KM_FLASH_GPIO_PIN switches between using a
Heiko Schocher60301192010-02-22 16:43:02 +0530270 * NAND or a SPI FLASH. Set this pin on start
271 * to NAND mode.
272 */
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000273 kw_gpio_set_valid(KM_FLASH_GPIO_PIN, 1);
274 kw_gpio_direction_output(KM_FLASH_GPIO_PIN, 1);
Heiko Schocher60301192010-02-22 16:43:02 +0530275
Heiko Schocher60301192010-02-22 16:43:02 +0530276#if defined(CONFIG_SOFT_I2C)
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000277 /*
278 * Reinit the GPIO for I2C Bitbang driver so that the now
279 * available gpio framework is consistent. The calls to
280 * direction output in are not necessary, they are already done in
281 * board_early_init_f
282 */
Heiko Schocher9878f992011-02-22 09:13:00 +0100283 kw_gpio_set_valid(KM_KIRKWOOD_SDA_PIN, 1);
284 kw_gpio_set_valid(KM_KIRKWOOD_SCL_PIN, 1);
Heiko Schocher60301192010-02-22 16:43:02 +0530285#endif
Holger Brunck7d25a1a2012-07-05 05:05:11 +0000286
Heiko Schocher60301192010-02-22 16:43:02 +0530287#if defined(CONFIG_SYS_EEPROM_WREN)
Heiko Schocher9878f992011-02-22 09:13:00 +0100288 kw_gpio_set_valid(KM_KIRKWOOD_ENV_WP, 38);
289 kw_gpio_direction_output(KM_KIRKWOOD_ENV_WP, 1);
Heiko Schocher60301192010-02-22 16:43:02 +0530290#endif
Heiko Schocher3ebd02b2010-10-20 19:33:26 +0530291
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000292#if defined(CONFIG_KM_FPGA_CONFIG)
293 trigger_fpga_config();
294#endif
295
296 return 0;
297}
298
299int board_late_init(void)
300{
Thomas Herzmann3ed53142012-07-05 05:05:10 +0000301#if defined(CONFIG_KMCOGE5UN)
302/* I/O pin to erase flash RGPP09 = MPP43 */
303#define KM_FLASH_ERASE_ENABLE 43
304 u8 dip_switch = kw_gpio_get_value(KM_FLASH_ERASE_ENABLE);
305
306 /* if pin 1 do full erase */
307 if (dip_switch != 0) {
308 /* start bootloader */
309 puts("DIP: Enabled\n");
310 setenv("actual_bank", "0");
311 }
312#endif
313
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000314#if defined(CONFIG_KM_FPGA_CONFIG)
315 wait_for_fpga_config();
316 fpga_reset();
317 toggle_eeprom_spi_bus();
318#endif
Heiko Schochercfc58042010-04-26 13:07:28 +0200319 return 0;
320}
321
Valentin Longchamp96957ef2012-06-13 03:01:03 +0000322int board_spi_claim_bus(struct spi_slave *slave)
Heiko Schocher60301192010-02-22 16:43:02 +0530323{
Valentin Longchamp96957ef2012-06-13 03:01:03 +0000324 kw_gpio_set_value(KM_FLASH_GPIO_PIN, 0);
Heiko Schocher60301192010-02-22 16:43:02 +0530325
326 return 0;
327}
328
Valentin Longchamp96957ef2012-06-13 03:01:03 +0000329void board_spi_release_bus(struct spi_slave *slave)
330{
331 kw_gpio_set_value(KM_FLASH_GPIO_PIN, 1);
332}
Heiko Schocher60301192010-02-22 16:43:02 +0530333
Holger Brunckc9caa7f2012-07-05 05:05:04 +0000334#if (defined(CONFIG_KM_PIGGY4_88E6061))
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530335
Valentin Longchampa7ef9af2012-07-05 05:05:07 +0000336#define PHY_LED_SEL_REG 0x18
337#define PHY_LED0_LINK (0x5)
338#define PHY_LED1_ACT (0x8<<4)
339#define PHY_LED2_INT (0xe<<8)
340#define PHY_SPEC_CTRL_REG 0x1c
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530341#define PHY_RGMII_CLK_STABLE (0x1<<10)
Valentin Longchampa7ef9af2012-07-05 05:05:07 +0000342#define PHY_CLSA (0x1<<1)
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530343
344/* Configure and enable MV88E3018 PHY */
Heiko Schocher60301192010-02-22 16:43:02 +0530345void reset_phy(void)
346{
347 char *name = "egiga0";
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530348 unsigned short reg;
Heiko Schocher60301192010-02-22 16:43:02 +0530349
350 if (miiphy_set_current_dev(name))
351 return;
352
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530353 /* RGMII clk transition on data stable */
Valentin Longchampa7ef9af2012-07-05 05:05:07 +0000354 if (!miiphy_read(name, CONFIG_PHY_BASE_ADR, PHY_SPEC_CTRL_REG, &reg))
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530355 printf("Error reading PHY spec ctrl reg\n");
Valentin Longchampa7ef9af2012-07-05 05:05:07 +0000356 if (!miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_SPEC_CTRL_REG,
357 reg | PHY_RGMII_CLK_STABLE | PHY_CLSA))
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530358 printf("Error writing PHY spec ctrl reg\n");
359
360 /* leds setup */
Valentin Longchampa7ef9af2012-07-05 05:05:07 +0000361 if (!miiphy_write(name, CONFIG_PHY_BASE_ADR, PHY_LED_SEL_REG,
362 PHY_LED0_LINK | PHY_LED1_ACT | PHY_LED2_INT))
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530363 printf("Error writing PHY LED reg\n");
364
Heiko Schocher60301192010-02-22 16:43:02 +0530365 /* reset the phy */
366 miiphy_reset(name, CONFIG_PHY_BASE_ADR);
367}
Valentin Longchamp3f29cbb2011-06-16 18:11:15 +0530368#else
369/* Configure and enable MV88E1118 PHY on the piggy*/
370void reset_phy(void)
371{
372 char *name = "egiga0";
373
374 if (miiphy_set_current_dev(name))
375 return;
376
377 /* reset the phy */
378 miiphy_reset(name, CONFIG_PHY_BASE_ADR);
379}
380#endif
381
Heiko Schocher60301192010-02-22 16:43:02 +0530382
383#if defined(CONFIG_HUSH_INIT_VAR)
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100384int hush_init_var(void)
Heiko Schocher60301192010-02-22 16:43:02 +0530385{
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100386 ivm_read_eeprom();
Heiko Schocher60301192010-02-22 16:43:02 +0530387 return 0;
388}
389#endif
390
Heiko Schocher60301192010-02-22 16:43:02 +0530391#if defined(CONFIG_SOFT_I2C)
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100392void set_sda(int state)
Heiko Schocher60301192010-02-22 16:43:02 +0530393{
394 I2C_ACTIVE;
395 I2C_SDA(state);
396}
397
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100398void set_scl(int state)
Heiko Schocher60301192010-02-22 16:43:02 +0530399{
400 I2C_SCL(state);
401}
402
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100403int get_sda(void)
Heiko Schocher60301192010-02-22 16:43:02 +0530404{
405 I2C_TRISTATE;
406 return I2C_READ;
407}
408
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100409int get_scl(void)
Heiko Schocher60301192010-02-22 16:43:02 +0530410{
Heiko Schocher9878f992011-02-22 09:13:00 +0100411 return kw_gpio_get_value(KM_KIRKWOOD_SCL_PIN) ? 1 : 0;
Heiko Schocher60301192010-02-22 16:43:02 +0530412}
413#endif
414
Valentin Longchamp24ec9932011-09-12 04:18:42 +0000415#if defined(CONFIG_POST)
416
417#define KM_POST_EN_L 44
418#define POST_WORD_OFF 8
419
420int post_hotkeys_pressed(void)
421{
Holger Brunckf065ce02012-07-05 05:05:02 +0000422#if defined(CONFIG_KM_COGE5UN)
423 return kw_gpio_get_value(KM_POST_EN_L);
424#else
Valentin Longchamp24ec9932011-09-12 04:18:42 +0000425 return !kw_gpio_get_value(KM_POST_EN_L);
Holger Brunckf065ce02012-07-05 05:05:02 +0000426#endif
Valentin Longchamp24ec9932011-09-12 04:18:42 +0000427}
428
429ulong post_word_load(void)
430{
Holger Brunck763c2dc2011-12-14 05:31:20 +0000431 void* addr = (void *) (gd->ram_size - BOOTCOUNT_ADDR + POST_WORD_OFF);
Valentin Longchamp24ec9932011-09-12 04:18:42 +0000432 return in_le32(addr);
433
434}
435void post_word_store(ulong value)
436{
Holger Brunck763c2dc2011-12-14 05:31:20 +0000437 void* addr = (void *) (gd->ram_size - BOOTCOUNT_ADDR + POST_WORD_OFF);
Valentin Longchamp24ec9932011-09-12 04:18:42 +0000438 out_le32(addr, value);
439}
440
441int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
442{
443 *vstart = CONFIG_SYS_SDRAM_BASE;
444
445 /* we go up to relocation plus a 1 MB margin */
446 *size = CONFIG_SYS_TEXT_BASE - (1<<20);
447
448 return 0;
449}
450#endif
451
Heiko Schocher60301192010-02-22 16:43:02 +0530452#if defined(CONFIG_SYS_EEPROM_WREN)
Heiko Schocher8ce3dd52011-03-15 16:52:29 +0100453int eeprom_write_enable(unsigned dev_addr, int state)
Heiko Schocher60301192010-02-22 16:43:02 +0530454{
Heiko Schocher9878f992011-02-22 09:13:00 +0100455 kw_gpio_set_value(KM_KIRKWOOD_ENV_WP, !state);
Heiko Schocher60301192010-02-22 16:43:02 +0530456
Heiko Schocher9878f992011-02-22 09:13:00 +0100457 return !kw_gpio_get_value(KM_KIRKWOOD_ENV_WP);
Heiko Schocher60301192010-02-22 16:43:02 +0530458}
459#endif