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Magnus Lilja6eeb6f72009-07-01 01:07:55 +02001/*
2 *
3 * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
4 *
5 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26
27#include <common.h>
Ben Warrenfbfdd3a2009-07-20 22:01:11 -070028#include <netdev.h>
Stefano Babic78129d92011-03-14 15:43:56 +010029#include <asm/arch/clock.h>
30#include <asm/arch/imx-regs.h>
Helmut Raiger035929c2011-09-29 05:45:03 +000031#include <asm/arch/sys_proto.h>
Fabio Estevam5e4f3802011-04-10 08:17:50 +000032#include <watchdog.h>
Fabio Estevam578bac02011-10-24 05:32:28 +000033#include <pmic.h>
34#include <fsl_pmic.h>
Magnus Lilja6eeb6f72009-07-01 01:07:55 +020035
36DECLARE_GLOBAL_DATA_PTR;
37
Fabio Estevam5e4f3802011-04-10 08:17:50 +000038#ifdef CONFIG_HW_WATCHDOG
39void hw_watchdog_reset(void)
40{
41 mxc_hw_watchdog_reset();
42}
43#endif
44
Magnus Lilja6eeb6f72009-07-01 01:07:55 +020045int dram_init(void)
46{
Fabio Estevam66a8b4d2011-02-09 01:17:55 +000047 /* dram_init must store complete ramsize in gd->ram_size */
Albert ARIBAUDa9606732011-07-03 05:55:33 +000048 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
Fabio Estevam66a8b4d2011-02-09 01:17:55 +000049 PHYS_SDRAM_1_SIZE);
50 return 0;
51}
52
Fabio Estevam1af83e32011-02-09 01:17:56 +000053int board_early_init_f(void)
Magnus Lilja6eeb6f72009-07-01 01:07:55 +020054{
55 /* CS5: CPLD incl. network controller */
Helmut Raiger035929c2011-09-29 05:45:03 +000056 static const struct mxc_weimcs cs5 = {
57 /* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
58 CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 24, 0, 4, 3),
59 /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
60 CSCR_L(2, 2, 2, 5, 2, 0, 5, 2, 0, 0, 0, 1),
61 /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
62 CSCR_A(2, 2, 2, 2, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0)
63 };
64
65 mxc_setup_weimcs(5, &cs5);
Magnus Lilja6eeb6f72009-07-01 01:07:55 +020066
67 /* Setup UART1 and SPI2 pins */
68 mx31_uart1_hw_init();
69 mx31_spi2_hw_init();
70
Fabio Estevam1af83e32011-02-09 01:17:56 +000071 return 0;
72}
73
74int board_init(void)
75{
Magnus Lilja6eeb6f72009-07-01 01:07:55 +020076 /* adress of boot parameters */
77 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
78
79 return 0;
80}
81
Fabio Estevam5e4f3802011-04-10 08:17:50 +000082int board_late_init(void)
83{
Fabio Estevam578bac02011-10-24 05:32:28 +000084 u32 val;
85 struct pmic *p;
86
87 pmic_init();
88 p = get_pmic();
89
90 /* Enable RTC battery */
91 pmic_reg_read(p, REG_POWER_CTL0, &val);
92 pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN);
93 pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI);
Fabio Estevam5e4f3802011-04-10 08:17:50 +000094#ifdef CONFIG_HW_WATCHDOG
95 mxc_hw_watchdog_enable();
96#endif
97 return 0;
98}
99
Magnus Lilja6eeb6f72009-07-01 01:07:55 +0200100int checkboard(void)
101{
Fabio Estevam7450e2a2011-04-18 07:38:12 +0000102 printf("Board: MX31PDK\n");
Magnus Lilja6eeb6f72009-07-01 01:07:55 +0200103 return 0;
104}
Ben Warrenfbfdd3a2009-07-20 22:01:11 -0700105
106int board_eth_init(bd_t *bis)
107{
108 int rc = 0;
109#ifdef CONFIG_SMC911X
110 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
111#endif
112 return rc;
113}