Mathieu Othacehe | 9bfca75 | 2024-01-30 15:50:37 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_IMX9=y |
| 3 | CONFIG_TEXT_BASE=0x80200000 |
| 4 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
| 5 | CONFIG_SYS_MALLOC_F_LEN=0x20000 |
| 6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 8 | CONFIG_NR_DRAM_BANKS=2 |
| 9 | CONFIG_ENV_SOURCE_FILE="phycore_imx93" |
| 10 | CONFIG_ENV_SIZE=0x10000 |
| 11 | CONFIG_ENV_OFFSET=0x700000 |
| 12 | CONFIG_IMX_CONFIG="arch/arm/mach-imx/imx9/imximage.cfg" |
| 13 | CONFIG_DM_GPIO=y |
| 14 | CONFIG_DEFAULT_DEVICE_TREE="imx93-phyboard-segin" |
| 15 | CONFIG_SPL_TEXT_BASE=0x2049A000 |
| 16 | CONFIG_AHAB_BOOT=y |
| 17 | CONFIG_TARGET_PHYCORE_IMX93=y |
| 18 | CONFIG_OF_LIBFDT_OVERLAY=y |
| 19 | CONFIG_SYS_MONITOR_LEN=524288 |
| 20 | CONFIG_SPL_SERIAL=y |
| 21 | CONFIG_SPL_DRIVERS_MISC=y |
| 22 | CONFIG_SPL_STACK=0x20519dd0 |
| 23 | CONFIG_SPL=y |
| 24 | CONFIG_ENV_OFFSET_REDUND=0x720000 |
| 25 | CONFIG_CMD_DEKBLOB=y |
| 26 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 |
| 27 | CONFIG_SYS_LOAD_ADDR=0x80400000 |
| 28 | CONFIG_SYS_MEMTEST_START=0x80000000 |
| 29 | CONFIG_SYS_MEMTEST_END=0x90000000 |
| 30 | CONFIG_REMAKE_ELF=y |
| 31 | CONFIG_DISTRO_DEFAULTS=y |
| 32 | CONFIG_OF_SYSTEM_SETUP=y |
| 33 | CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" |
| 34 | CONFIG_DEFAULT_FDT_FILE="oftree" |
| 35 | CONFIG_SYS_CBSIZE=2048 |
| 36 | CONFIG_SYS_PBSIZE=2074 |
| 37 | CONFIG_BOARD_LATE_INIT=y |
| 38 | CONFIG_SPL_MAX_SIZE=0x26000 |
| 39 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 40 | CONFIG_SPL_BSS_START_ADDR=0x2051a000 |
| 41 | CONFIG_SPL_BSS_MAX_SIZE=0x2000 |
| 42 | CONFIG_SPL_BOARD_INIT=y |
| 43 | CONFIG_SPL_BOOTROM_SUPPORT=y |
| 44 | CONFIG_SPL_LOAD_IMX_CONTAINER=y |
| 45 | CONFIG_IMX_CONTAINER_CFG="arch/arm/mach-imx/imx9/container.cfg" |
| 46 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 47 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
| 48 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040 |
| 49 | CONFIG_SPL_I2C=y |
| 50 | CONFIG_SPL_POWER=y |
| 51 | CONFIG_SPL_WATCHDOG=y |
| 52 | CONFIG_SYS_PROMPT="u-boot=> " |
Mathieu Othacehe | 9bfca75 | 2024-01-30 15:50:37 +0100 | [diff] [blame] | 53 | CONFIG_CMD_ERASEENV=y |
| 54 | CONFIG_CMD_NVEDIT_EFI=y |
| 55 | CONFIG_CRC32_VERIFY=y |
| 56 | CONFIG_CMD_EEPROM=y |
| 57 | CONFIG_SYS_I2C_EEPROM_BUS=2 |
| 58 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 |
| 59 | CONFIG_SYS_EEPROM_SIZE=4096 |
| 60 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 |
| 61 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 |
| 62 | CONFIG_CMD_MEMTEST=y |
| 63 | CONFIG_CMD_CLK=y |
| 64 | CONFIG_CMD_DFU=y |
| 65 | CONFIG_CMD_FUSE=y |
| 66 | CONFIG_CMD_GPIO=y |
| 67 | CONFIG_CMD_I2C=y |
| 68 | CONFIG_CMD_MMC=y |
| 69 | CONFIG_CMD_POWEROFF=y |
Mathieu Othacehe | e40a1a4 | 2024-03-21 15:45:40 +0100 | [diff] [blame^] | 70 | CONFIG_CMD_USB=y |
Mathieu Othacehe | 9bfca75 | 2024-01-30 15:50:37 +0100 | [diff] [blame] | 71 | CONFIG_CMD_SNTP=y |
| 72 | CONFIG_CMD_CACHE=y |
| 73 | CONFIG_CMD_EFIDEBUG=y |
| 74 | CONFIG_CMD_RTC=y |
| 75 | CONFIG_CMD_TIME=y |
| 76 | CONFIG_CMD_GETTIME=y |
| 77 | CONFIG_CMD_TIMER=y |
| 78 | CONFIG_CMD_REGULATOR=y |
| 79 | CONFIG_CMD_HASH=y |
| 80 | CONFIG_CMD_EXT4_WRITE=y |
| 81 | CONFIG_OF_CONTROL=y |
| 82 | CONFIG_SPL_OF_CONTROL=y |
| 83 | CONFIG_ENV_OVERWRITE=y |
| 84 | CONFIG_ENV_IS_NOWHERE=y |
| 85 | CONFIG_ENV_IS_IN_MMC=y |
| 86 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
| 87 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 88 | CONFIG_SYS_MMC_ENV_DEV=1 |
| 89 | CONFIG_USE_ETHPRIME=y |
| 90 | CONFIG_ETHPRIME="eth1" |
| 91 | CONFIG_NET_RANDOM_ETHADDR=y |
| 92 | CONFIG_SPL_DM=y |
| 93 | CONFIG_SPL_CLK_IMX93=y |
| 94 | CONFIG_CLK_IMX93=y |
| 95 | CONFIG_DFU_MMC=y |
| 96 | CONFIG_DFU_RAM=y |
| 97 | CONFIG_GPIO_HOG=y |
| 98 | CONFIG_IMX_RGPIO2P=y |
| 99 | CONFIG_DM_I2C=y |
| 100 | CONFIG_SYS_I2C_IMX_LPI2C=y |
| 101 | CONFIG_I2C_EEPROM=y |
| 102 | CONFIG_SYS_I2C_EEPROM_ADDR=0x50 |
| 103 | CONFIG_SUPPORT_EMMC_BOOT=y |
| 104 | CONFIG_MMC_IO_VOLTAGE=y |
| 105 | CONFIG_MMC_UHS_SUPPORT=y |
| 106 | CONFIG_MMC_HS400_ES_SUPPORT=y |
| 107 | CONFIG_MMC_HS400_SUPPORT=y |
| 108 | CONFIG_FSL_USDHC=y |
| 109 | CONFIG_PHY_TI_GENERIC=y |
| 110 | CONFIG_DM_ETH_PHY=y |
| 111 | CONFIG_DWC_ETH_QOS=y |
| 112 | CONFIG_DWC_ETH_QOS_IMX=y |
| 113 | CONFIG_FEC_MXC=y |
| 114 | CONFIG_MII=y |
| 115 | CONFIG_PINCTRL=y |
| 116 | CONFIG_SPL_PINCTRL=y |
| 117 | CONFIG_PINCTRL_IMX93=y |
| 118 | CONFIG_POWER_DOMAIN=y |
| 119 | CONFIG_DM_PMIC=y |
| 120 | CONFIG_DM_PMIC_PCA9450=y |
| 121 | CONFIG_SPL_DM_PMIC_PCA9450=y |
| 122 | CONFIG_DM_REGULATOR=y |
| 123 | CONFIG_DM_REGULATOR_PCA9450=y |
| 124 | CONFIG_DM_REGULATOR_FIXED=y |
| 125 | CONFIG_DM_REGULATOR_GPIO=y |
| 126 | CONFIG_DM_RTC=y |
| 127 | CONFIG_DM_SERIAL=y |
| 128 | CONFIG_FSL_LPUART=y |
| 129 | CONFIG_SPI=y |
| 130 | CONFIG_DM_SPI=y |
| 131 | CONFIG_SYSRESET=y |
| 132 | CONFIG_SPL_SYSRESET=y |
| 133 | CONFIG_SYSRESET_WATCHDOG=y |
| 134 | CONFIG_DM_THERMAL=y |
| 135 | CONFIG_IMX_TMU=y |
Mathieu Othacehe | e40a1a4 | 2024-03-21 15:45:40 +0100 | [diff] [blame^] | 136 | CONFIG_USB=y |
| 137 | CONFIG_USB_EHCI_HCD=y |
| 138 | CONFIG_USB_GADGET=y |
| 139 | CONFIG_USB_GADGET_MANUFACTURER="PHYTEC" |
| 140 | CONFIG_USB_GADGET_VENDOR_NUM=0x1fc9 |
| 141 | CONFIG_USB_GADGET_PRODUCT_NUM=0x0152 |
| 142 | CONFIG_CI_UDC=y |
Mathieu Othacehe | 9bfca75 | 2024-01-30 15:50:37 +0100 | [diff] [blame] | 143 | CONFIG_ULP_WATCHDOG=y |
| 144 | CONFIG_LZO=y |
| 145 | CONFIG_BZIP2=y |