Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / e3c77a69268e98681791e8259a02b4ab72f9824a / . / configs / theadorable_debug_defconfig
blob: 9074ca1620ba62e5498ba94886956d60615bb1b2 [file] [log] [blame]
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]1CONFIG_ARM=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]2CONFIG_ARCH_CPU_INIT=y
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]3CONFIG_ARCH_MVEBU=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]4CONFIG_SYS_TEXT_BASE=0x00800000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]5CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]6CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=2
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]8CONFIG_TARGET_THEADORABLE=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]9CONFIG_ENV_SIZE=0x10000
10CONFIG_ENV_OFFSET=0x100000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]11CONFIG_ENV_SECT_SIZE=0x40000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]13CONFIG_SPL_TEXT_BASE=0x40004030
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]14CONFIG_SPL_SERIAL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]15CONFIG_SPL=y
Pali Rohár40954732022-05-09 20:17:07 +0200[diff] [blame]16CONFIG_DEBUG_UART_BASE=0xf1012000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]17CONFIG_DEBUG_UART_CLOCK=250000000
Tom Rini59d1a712022-05-05 14:47:31 -0400[diff] [blame]18CONFIG_SYS_MEM_TOP_HIDE=0x80000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]19CONFIG_SYS_LOAD_ADDR=0x800000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]20CONFIG_DEBUG_UART=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]21CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
22CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]23# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]24CONFIG_FIT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]25CONFIG_BOOTDELAY=3
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]26CONFIG_USE_PREBOOT=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]27# CONFIG_CONSOLE_MUX is not set
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]28CONFIG_SYS_CONSOLE_INFO_QUIET=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]29# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]30CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]31CONFIG_SPL_MAX_SIZE=0x1bfd0
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]32CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
33CONFIG_SPL_BSS_START_ADDR=0x40020000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]34CONFIG_SPL_BSS_MAX_SIZE=0x4000
Tom Rinie7d67a42022-05-20 12:36:05 -0400[diff] [blame]35CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]36# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
37CONFIG_SPL_STACK=0x4002c000
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]38CONFIG_SPL_I2C=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]39CONFIG_HUSH_PARSER=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]40CONFIG_SYS_MAXARGS=32
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]41CONFIG_CMD_BOOTZ=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]42CONFIG_CMD_GPIO=y
43CONFIG_CMD_I2C=y
44CONFIG_CMD_PCI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]45CONFIG_CMD_SPI=y
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]46CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]47CONFIG_CMD_DHCP=y
Tom Rinie8f8d672018-04-17 09:22:31 -0400[diff] [blame]48CONFIG_CMD_TFTPPUT=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]49CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]50CONFIG_CMD_PING=y
Simon Glassb575bfc2017-04-26 22:27:55 -0600[diff] [blame]51CONFIG_CMD_BMP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]52CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]53CONFIG_CMD_TIME=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]54CONFIG_CMD_EXT2=y
55CONFIG_CMD_EXT4=y
56CONFIG_CMD_FAT=y
57CONFIG_CMD_FS_GENERIC=y
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +0100[diff] [blame]58CONFIG_EFI_PARTITION=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]59CONFIG_ENV_OVERWRITE=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]60CONFIG_ENV_SPI_MAX_HZ=50000000
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]61CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinia8a77502022-03-11 09:12:01 -0500[diff] [blame]62CONFIG_ARP_TIMEOUT=200
Tom Rini26011a32022-03-11 09:12:02 -0500[diff] [blame]63CONFIG_NET_RETRY_COUNT=50
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]64CONFIG_NET_RANDOM_ETHADDR=y
65CONFIG_SPL_OF_TRANSLATE=y
Tuomas Tynkkynen9f1caca2017-12-08 15:36:16 +0200[diff] [blame]66CONFIG_SATA_MV=y
Simon Glass231e7742022-01-31 07:49:37 -0700[diff] [blame]67CONFIG_SYS_SATA_MAX_DEVICE=1
Tom Rini3f004772022-06-10 22:59:28 -0400[diff] [blame]68CONFIG_LBA48=y
Lukasz Majewski6dd8c902018-02-09 23:50:57 +0100[diff] [blame]69CONFIG_BOOTCOUNT_LIMIT=y
Alex Kiernan2a694292018-02-16 15:50:42 +0000[diff] [blame]70CONFIG_BOOTCOUNT_RAM=y
Tien Fong Chee647c5f32017-07-26 13:05:39 +0800[diff] [blame]71CONFIG_FPGA_ALTERA=y
Tom Rinid1ad8172022-06-12 20:02:00 -0400[diff] [blame]72CONFIG_FPGA_STRATIX_V=y
Stefan Roese767837d2021-11-18 09:19:31 +0100[diff] [blame]73CONFIG_DM_I2C=y
Tom Rini8825ec42021-08-17 17:59:47 -0400[diff] [blame]74CONFIG_SYS_I2C_MVTWSI=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]75# CONFIG_MMC is not set
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]76CONFIG_SF_DEFAULT_SPEED=27777777
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]77CONFIG_SPI_FLASH_MACRONIX=y
78CONFIG_SPI_FLASH_STMICRO=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]79CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]80CONFIG_PHY_GIGE=y
Chris Packham919041c2017-08-21 20:17:03 +1200[diff] [blame]81CONFIG_MVNETA=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]82CONFIG_MII=y
Marek Behún99e296f2022-04-27 12:41:46 +0200[diff] [blame]83CONFIG_MVMDIO=y
Tom Rinif48e0252016-10-26 17:15:37 -0400[diff] [blame]84CONFIG_PCI=y
Stefan Roese3179ec62019-01-25 11:52:43 +0100[diff] [blame]85CONFIG_DM_PCI_COMPAT=y
86CONFIG_PCI_MVEBU=y
Pali Rohár40954732022-05-09 20:17:07 +0200[diff] [blame]87CONFIG_SPL_DEBUG_UART_BASE=0xd0012000
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]88CONFIG_DEBUG_UART_SHIFT=2
89CONFIG_SYS_NS16550=y
Tuomas Tynkkynen13b5cb82018-02-07 02:42:22 +0200[diff] [blame]90CONFIG_KIRKWOOD_SPI=y
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]91CONFIG_USB=y
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]92CONFIG_USB_EHCI_HCD=y
93CONFIG_USB_STORAGE=y
Stefan Roeseee4f68b2019-01-30 08:54:11 +0100[diff] [blame]94CONFIG_DM_VIDEO=y
Anatolij Gustschindba36702020-02-04 22:43:06 +0100[diff] [blame]95# CONFIG_VIDEO_BPP8 is not set
96# CONFIG_VIDEO_BPP32 is not set
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]97CONFIG_VIDEO_MVEBU=y
Patrick Delaunayb1f17632020-09-28 11:30:16 +0200[diff] [blame]98CONFIG_BMP_16BPP=y
99CONFIG_BMP_24BPP=y
100CONFIG_BMP_32BPP=y