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wdenkc542fb22002-11-03 00:47:09 +00001/*
2 * BMW/MPC8245 Board definitions.
3 * For more info, see http://www.vooha.com/
4 *
5 * (C) Copyright 2000
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2002
9 * James Dougherty (jfd@broadcom.com)
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#ifndef __BMW_H
31#define __BMW_H
32
33/* System addresses */
34
35#define PCI_SPECIAL_BASE 0xfe000000
36#define PCI_SPECIAL_SIZE 0x01000000
37
38#define EUMBBAR_VAL 0x80500000 /* Location of EUMB region */
39#define EUMBSIZE 0x00100000 /* Size of EUMB region */
40
41/* Extended ROM space devices */
42#define DOC_BASE_ADDR 0xff000000 /* Onboard DOC TSOP 16MB */
43#define DOC2_BASE_ADDR 0x70000000 /* DIP32 socket -> 1GB */
44#define XROM_BASE_ADDR 0x7c000000 /* RCS2 (PAL / Satellite IO) */
45#define PLD_REG_BASE XROM_BASE_ADDR
46#define LED_REG_BASE (XROM_BASE_ADDR | 0x2000)
47#define TOD_BASE (XROM_BASE_ADDR | 0x4000)
48#define LED_REG(x) (*(volatile unsigned char *) \
49 (LED_REG_BASE + (x)))
50#define XROM_DEV_SIZE 0x00006000
51
52#define ENET_DEV_BASE 0x80000000
53
54#define PLD_REG(off) (*(volatile unsigned char *)\
55 (PLD_REG_BASE + (off)))
56
57#define PLD_REVID_B1 0x7f /* Fix me */
58#define PLD_REVID_B2 0x01 /* Fix me */
59
60#define SYS_HARD_RESET() { for (;;) PLD_REG(0) = 0; } /* clr 0x80 bit */
61#define SYS_REVID_GET() ((int) PLD_REG(0) & 0x7f)
62#define SYS_LED_OFF() (PLD_REG(1) |= 0x80)
63#define SYS_LED_ON() (PLD_REG(1) &= ~0x80)
64#define SYS_WATCHDOG_IRQ3() (PLD_REG(2) |= 0x80)
65#define SYS_WATCHDOG_RESET() (PLD_REG(2) &= ~0x80)
66#define SYS_TOD_PROTECT() (PLD_REG(3) |= 0x80)
67#define SYS_TOD_UNPROTECT() (PLD_REG(3) &= ~0x80)
68
69#define TOD_REG_BASE (TOD_BASE | 0x1ff0)
70#define TOD_NVRAM_BASE TOD_BASE
71#define TOD_NVRAM_SIZE 0x1ff0
72#define TOD_NVRAM_LIMIT (TOD_NVRAM_BASE + TOD_NVRAM_SIZE)
73#define RTC(r) (TOD_BASE + r)
74
75/* Onboard BCM570x device */
76#define PCI_ENET_IOADDR 0x80000000
77#define PCI_ENET_MEMADDR 0x80000000
78
79
80#ifndef __ASSEMBLY__
81/* C Function prototypes */
82void sys_led_msg(char* msg);
83
84#endif /* !__ASSEMBLY__ */
85
86#endif /* __BMW_H */