blob: 44d422da1b97c624e16117ed9e981ded29189399 [file] [log] [blame]
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02001/*
2 * LG Optimus Black (P970) codename sniper board
3 *
4 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <config.h>
10#include <common.h>
11#include <dm.h>
Paul Kocialkowski248b7912015-07-20 15:17:12 +020012#include <linux/ctype.h>
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020013#include <asm/arch/mmc_host_def.h>
14#include <asm/arch/sys_proto.h>
15#include <asm/arch/mem.h>
16#include <asm/io.h>
17#include <ns16550.h>
18#include <twl4030.h>
19#include "sniper.h"
20
21DECLARE_GLOBAL_DATA_PTR;
22
23const omap3_sysinfo sysinfo = {
24 .mtype = DDR_STACKED,
25 .board_string = "Sniper",
26 .nand_string = "MMC"
27};
28
29static const struct ns16550_platdata serial_omap_platdata = {
30 .base = OMAP34XX_UART3,
31 .reg_shift = 2,
32 .clock = V_NS16550_CLK
33};
34
35U_BOOT_DEVICE(sniper_serial) = {
36 .name = "serial_omap",
37 .platdata = &serial_omap_platdata
38};
39
40#ifdef CONFIG_SPL_BUILD
41void get_board_mem_timings(struct board_sdrc_timings *timings)
42{
43 timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
44 timings->ctrla = HYNIX_V_ACTIMA_200;
45 timings->ctrlb = HYNIX_V_ACTIMB_200;
46 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
47 timings->mr = MICRON_V_MR_165;
48}
49#endif
50
51u32 get_board_rev(void)
52{
53 /* Sold devices are expected to be at least revision F. */
54 return 6;
55}
56
57int board_init(void)
58{
59 /* GPMC init */
60 gpmc_init();
61
62 /* MACH number */
63 gd->bd->bi_arch_number = 3000;
64
65 /* ATAGs location */
66 gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
67
68 return 0;
69}
70
Paul Kocialkowski248b7912015-07-20 15:17:12 +020071int misc_init_r(void)
72{
73 char reboot_mode[2] = { 0 };
74
75 /* Reboot mode */
76
77 reboot_mode[0] = omap_reboot_mode();
78 if (reboot_mode[0] > 0 && isascii(reboot_mode[0])) {
79 if (!getenv("reboot-mode"))
80 setenv("reboot-mode", (char *)reboot_mode);
81
82 omap_reboot_mode_clear();
83 }
84
85 return 0;
86}
87
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020088void set_muxconf_regs(void)
89{
90 MUX_SNIPER();
91}
92
93#ifndef CONFIG_SPL_BUILD
94int board_mmc_init(bd_t *bis)
95{
96 return omap_mmc_init(1, 0, 0, -1, -1);
97}
98#endif
99
100void board_mmc_power_init(void)
101{
102 twl4030_power_mmc_init(1);
103}