LG Optimus Black (P970) codename sniper support
The LG Optimus Black (P970) codename sniper is a smartphone that was designed
and manufactured by LG Electronics (LGE) and released back in 2011.
It is using an OMAP3630 SoC GP version, which allows running U-Boot and the
U-Boot SPL from the ground up. This port is aimed at running an Android version
such as Replicant, the fully free Android distribution. However, support for
upstream Linux with device-tree and common GNU/Linux distros boot commands
could be added in the future.
For more information about the journey to freeing this device, please read the
series of blog posts at:
http://code.paulk.fr/article20/a-hacker-s-journey-freeing-a-phone-from-the-ground-up-first-part
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add CONFIG_OF_SUPPORT]
Signed-off-by: Tom Rini <trini@konsulko.com>
diff --git a/board/lge/sniper/sniper.c b/board/lge/sniper/sniper.c
new file mode 100644
index 0000000..d5318c4
--- /dev/null
+++ b/board/lge/sniper/sniper.c
@@ -0,0 +1,85 @@
+/*
+ * LG Optimus Black (P970) codename sniper board
+ *
+ * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <dm.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mem.h>
+#include <asm/io.h>
+#include <ns16550.h>
+#include <twl4030.h>
+#include "sniper.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const omap3_sysinfo sysinfo = {
+ .mtype = DDR_STACKED,
+ .board_string = "Sniper",
+ .nand_string = "MMC"
+};
+
+static const struct ns16550_platdata serial_omap_platdata = {
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK
+};
+
+U_BOOT_DEVICE(sniper_serial) = {
+ .name = "serial_omap",
+ .platdata = &serial_omap_platdata
+};
+
+#ifdef CONFIG_SPL_BUILD
+void get_board_mem_timings(struct board_sdrc_timings *timings)
+{
+ timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
+ timings->ctrla = HYNIX_V_ACTIMA_200;
+ timings->ctrlb = HYNIX_V_ACTIMB_200;
+ timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
+ timings->mr = MICRON_V_MR_165;
+}
+#endif
+
+u32 get_board_rev(void)
+{
+ /* Sold devices are expected to be at least revision F. */
+ return 6;
+}
+
+int board_init(void)
+{
+ /* GPMC init */
+ gpmc_init();
+
+ /* MACH number */
+ gd->bd->bi_arch_number = 3000;
+
+ /* ATAGs location */
+ gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
+
+ return 0;
+}
+
+void set_muxconf_regs(void)
+{
+ MUX_SNIPER();
+}
+
+#ifndef CONFIG_SPL_BUILD
+int board_mmc_init(bd_t *bis)
+{
+ return omap_mmc_init(1, 0, 0, -1, -1);
+}
+#endif
+
+void board_mmc_power_init(void)
+{
+ twl4030_power_mmc_init(1);
+}