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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Chander Kashyapbfef54d2011-05-24 20:02:56 +00002/*
3 * Copyright (C) 2011 Samsung Electronics
Chander Kashyapbfef54d2011-05-24 20:02:56 +00004 */
5
6#include <common.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -07007#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
Simon Glass274e0b02020-05-10 11:39:56 -06009#include <net.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060010#include <asm/global_data.h>
Simon Glass37f11622014-10-20 19:48:37 -060011#include <asm/gpio.h>
Chander Kashyapbfef54d2011-05-24 20:02:56 +000012#include <asm/io.h>
13#include <netdev.h>
14#include <asm/arch/cpu.h>
Chander Kashyapbfef54d2011-05-24 20:02:56 +000015#include <asm/arch/mmc.h>
Rajeshwari Shinde99ae9b82013-07-04 12:29:16 +053016#include <asm/arch/periph.h>
17#include <asm/arch/pinmux.h>
Chander Kashyapbfef54d2011-05-24 20:02:56 +000018#include <asm/arch/sromc.h>
19
20DECLARE_GLOBAL_DATA_PTR;
Chander Kashyapbfef54d2011-05-24 20:02:56 +000021
22static void smc9115_pre_init(void)
23{
24 u32 smc_bw_conf, smc_bc_conf;
25
26 /* gpio configuration GPK0CON */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +053027 gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2));
Chander Kashyapbfef54d2011-05-24 20:02:56 +000028
29 /* Ethernet needs bus width of 16 bits */
30 smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
31 smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
32 | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
33 | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
34 | SROMC_BC_PMC(0x0F);
35
36 /* Select and configure the SROMC bank */
37 s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
38}
39
40int board_init(void)
41{
Chander Kashyapbfef54d2011-05-24 20:02:56 +000042 smc9115_pre_init();
43
Chander Kashyapbfef54d2011-05-24 20:02:56 +000044 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
45 return 0;
46}
47
48int dram_init(void)
49{
50 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
51 + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
52 + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
53 + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
54
55 return 0;
56}
57
Simon Glass2f949c32017-03-31 08:40:32 -060058int dram_init_banksize(void)
Chander Kashyapbfef54d2011-05-24 20:02:56 +000059{
60 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
Minkyu Kangd4e645b2015-10-23 15:59:37 +090061 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
Chander Kashyapf5ed2952011-09-20 21:25:02 +000062 PHYS_SDRAM_1_SIZE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +000063 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
Minkyu Kangd4e645b2015-10-23 15:59:37 +090064 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
Chander Kashyapf5ed2952011-09-20 21:25:02 +000065 PHYS_SDRAM_2_SIZE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +000066 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
Minkyu Kangd4e645b2015-10-23 15:59:37 +090067 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
Chander Kashyapf5ed2952011-09-20 21:25:02 +000068 PHYS_SDRAM_3_SIZE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +000069 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
Minkyu Kangd4e645b2015-10-23 15:59:37 +090070 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
Chander Kashyapf5ed2952011-09-20 21:25:02 +000071 PHYS_SDRAM_4_SIZE);
Simon Glass2f949c32017-03-31 08:40:32 -060072
73 return 0;
Chander Kashyapbfef54d2011-05-24 20:02:56 +000074}
75
Chander Kashyapbfef54d2011-05-24 20:02:56 +000076#ifdef CONFIG_DISPLAY_BOARDINFO
77int checkboard(void)
78{
79 printf("\nBoard: SMDKV310\n");
80 return 0;
81}
82#endif
83
Masahiro Yamada0a780172017-05-09 20:31:39 +090084#ifdef CONFIG_MMC
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +090085int board_mmc_init(struct bd_info *bis)
Chander Kashyapbfef54d2011-05-24 20:02:56 +000086{
87 int i, err;
88
89 /*
90 * MMC2 SD card GPIO:
91 *
92 * GPK2[0] SD_2_CLK(2)
93 * GPK2[1] SD_2_CMD(2)
94 * GPK2[2] SD_2_CDn
95 * GPK2[3:6] SD_2_DATA[0:3](2)
96 */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +053097 for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) {
Chander Kashyapbfef54d2011-05-24 20:02:56 +000098 /* GPK2[0:6] special function 2 */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +053099 gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2));
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000100
101 /* GPK2[0:6] drv 4x */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530102 gpio_set_drv(i, S5P_GPIO_DRV_4X);
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000103
104 /* GPK2[0:1] pull disable */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530105 if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) {
106 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000107 continue;
108 }
109
110 /* GPK2[2:6] pull up */
Akshay Saraswat1376cdd2014-05-13 10:30:14 +0530111 gpio_set_pull(i, S5P_GPIO_PULL_UP);
Chander Kashyapbfef54d2011-05-24 20:02:56 +0000112 }
113 err = s5p_mmc_init(2, 4);
114 return err;
115}
116#endif
Rajeshwari Shinde99ae9b82013-07-04 12:29:16 +0530117
118static int board_uart_init(void)
119{
120 int err;
121
122 err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
123 if (err) {
124 debug("UART0 not configured\n");
125 return err;
126 }
127
128 err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
129 if (err) {
130 debug("UART1 not configured\n");
131 return err;
132 }
133
134 err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
135 if (err) {
136 debug("UART2 not configured\n");
137 return err;
138 }
139
140 err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
141 if (err) {
142 debug("UART3 not configured\n");
143 return err;
144 }
145
146 return 0;
147}
148
149#ifdef CONFIG_BOARD_EARLY_INIT_F
150int board_early_init_f(void)
151{
152 int err;
153 err = board_uart_init();
154 if (err) {
155 debug("UART init failed\n");
156 return err;
157 }
158 return err;
159}
160#endif