Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 2 | /* |
| 3 | * From Coreboot file device/oprom/realmode/x86.c |
| 4 | * |
| 5 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 6 | * Copyright (C) 2009-2010 coresystems GmbH |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 7 | */ |
| 8 | #include <common.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 9 | #include <compiler.h> |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 10 | #include <bios_emul.h> |
Simon Glass | 9b61c7c | 2019-11-14 12:57:41 -0700 | [diff] [blame] | 11 | #include <irq_func.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
Simon Glass | ec86bc6 | 2022-07-30 15:52:04 -0600 | [diff] [blame] | 13 | #include <vesa.h> |
Masahiro Yamada | d0506f7 | 2014-12-03 17:36:57 +0900 | [diff] [blame] | 14 | #include <linux/linkage.h> |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 15 | #include <asm/cache.h> |
| 16 | #include <asm/processor.h> |
| 17 | #include <asm/i8259.h> |
| 18 | #include <asm/io.h> |
| 19 | #include <asm/post.h> |
| 20 | #include "bios.h" |
| 21 | |
| 22 | /* Interrupt handlers for each interrupt the ROM can call */ |
| 23 | static int (*int_handler[256])(void); |
| 24 | |
| 25 | /* to have a common register file for interrupt handlers */ |
Bin Meng | 9885721 | 2021-07-07 15:36:26 +0800 | [diff] [blame] | 26 | #ifndef CONFIG_BIOSEMU |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 27 | X86EMU_sysEnv _X86EMU_env; |
Bin Meng | 9885721 | 2021-07-07 15:36:26 +0800 | [diff] [blame] | 28 | #endif |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 29 | |
| 30 | asmlinkage void (*realmode_call)(u32 addr, u32 eax, u32 ebx, u32 ecx, u32 edx, |
| 31 | u32 esi, u32 edi); |
| 32 | |
| 33 | asmlinkage void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx, |
| 34 | u32 edx, u32 esi, u32 edi); |
| 35 | |
| 36 | static void setup_realmode_code(void) |
| 37 | { |
| 38 | memcpy((void *)REALMODE_BASE, &asm_realmode_code, |
| 39 | asm_realmode_code_size); |
| 40 | |
| 41 | /* Ensure the global pointers are relocated properly. */ |
| 42 | realmode_call = PTR_TO_REAL_MODE(asm_realmode_call); |
| 43 | realmode_interrupt = PTR_TO_REAL_MODE(__realmode_interrupt); |
| 44 | |
| 45 | debug("Real mode stub @%x: %d bytes\n", REALMODE_BASE, |
| 46 | asm_realmode_code_size); |
| 47 | } |
| 48 | |
| 49 | static void setup_rombios(void) |
| 50 | { |
| 51 | const char date[] = "06/11/99"; |
| 52 | memcpy((void *)0xffff5, &date, 8); |
| 53 | |
| 54 | const char ident[] = "PCI_ISA"; |
| 55 | memcpy((void *)0xfffd9, &ident, 7); |
| 56 | |
| 57 | /* system model: IBM-AT */ |
| 58 | writeb(0xfc, 0xffffe); |
| 59 | } |
| 60 | |
| 61 | static int int_exception_handler(void) |
| 62 | { |
| 63 | /* compatibility shim */ |
| 64 | struct eregs reg_info = { |
| 65 | .eax = M.x86.R_EAX, |
| 66 | .ecx = M.x86.R_ECX, |
| 67 | .edx = M.x86.R_EDX, |
| 68 | .ebx = M.x86.R_EBX, |
| 69 | .esp = M.x86.R_ESP, |
| 70 | .ebp = M.x86.R_EBP, |
| 71 | .esi = M.x86.R_ESI, |
| 72 | .edi = M.x86.R_EDI, |
| 73 | .vector = M.x86.intno, |
| 74 | .error_code = 0, |
| 75 | .eip = M.x86.R_EIP, |
| 76 | .cs = M.x86.R_CS, |
| 77 | .eflags = M.x86.R_EFLG |
| 78 | }; |
| 79 | struct eregs *regs = ®_info; |
| 80 | |
| 81 | debug("Oops, exception %d while executing option rom\n", regs->vector); |
| 82 | cpu_hlt(); |
| 83 | |
| 84 | return 0; |
| 85 | } |
| 86 | |
| 87 | static int int_unknown_handler(void) |
| 88 | { |
| 89 | debug("Unsupported software interrupt #0x%x eax 0x%x\n", |
| 90 | M.x86.intno, M.x86.R_EAX); |
| 91 | |
| 92 | return -1; |
| 93 | } |
| 94 | |
| 95 | /* setup interrupt handlers for mainboard */ |
| 96 | void bios_set_interrupt_handler(int intnum, int (*int_func)(void)) |
| 97 | { |
| 98 | int_handler[intnum] = int_func; |
| 99 | } |
| 100 | |
| 101 | static void setup_interrupt_handlers(void) |
| 102 | { |
| 103 | int i; |
| 104 | |
| 105 | /* |
| 106 | * The first 16 int_handler functions are not BIOS services, |
| 107 | * but the CPU-generated exceptions ("hardware interrupts") |
| 108 | */ |
| 109 | for (i = 0; i < 0x10; i++) |
| 110 | int_handler[i] = &int_exception_handler; |
| 111 | |
| 112 | /* Mark all other int_handler calls as unknown first */ |
| 113 | for (i = 0x10; i < 0x100; i++) { |
| 114 | /* Skip if bios_set_interrupt_handler() isn't called first */ |
| 115 | if (int_handler[i]) |
| 116 | continue; |
| 117 | |
| 118 | /* |
| 119 | * Now set the default functions that are actually needed |
| 120 | * to initialize the option roms. The board may override |
| 121 | * these with bios_set_interrupt_handler() |
| 122 | */ |
| 123 | switch (i) { |
| 124 | case 0x10: |
| 125 | int_handler[0x10] = &int10_handler; |
| 126 | break; |
| 127 | case 0x12: |
| 128 | int_handler[0x12] = &int12_handler; |
| 129 | break; |
| 130 | case 0x16: |
| 131 | int_handler[0x16] = &int16_handler; |
| 132 | break; |
| 133 | case 0x1a: |
| 134 | int_handler[0x1a] = &int1a_handler; |
| 135 | break; |
| 136 | default: |
| 137 | int_handler[i] = &int_unknown_handler; |
| 138 | break; |
| 139 | } |
| 140 | } |
| 141 | } |
| 142 | |
| 143 | static void write_idt_stub(void *target, u8 intnum) |
| 144 | { |
| 145 | unsigned char *codeptr; |
| 146 | |
| 147 | codeptr = (unsigned char *)target; |
| 148 | memcpy(codeptr, &__idt_handler, __idt_handler_size); |
| 149 | codeptr[3] = intnum; /* modify int# in the code stub. */ |
| 150 | } |
| 151 | |
| 152 | static void setup_realmode_idt(void) |
| 153 | { |
| 154 | struct realmode_idt *idts = NULL; |
| 155 | int i; |
| 156 | |
| 157 | /* |
| 158 | * Copy IDT stub code for each interrupt. This might seem wasteful |
| 159 | * but it is really simple |
| 160 | */ |
| 161 | for (i = 0; i < 256; i++) { |
| 162 | idts[i].cs = 0; |
| 163 | idts[i].offset = 0x1000 + (i * __idt_handler_size); |
Simon Glass | aa0ed9d | 2017-01-16 07:03:42 -0700 | [diff] [blame] | 164 | write_idt_stub((void *)((ulong)idts[i].offset), i); |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 165 | } |
| 166 | |
| 167 | /* |
| 168 | * Many option ROMs use the hard coded interrupt entry points in the |
| 169 | * system bios. So install them at the known locations. |
| 170 | */ |
| 171 | |
| 172 | /* int42 is the relocated int10 */ |
| 173 | write_idt_stub((void *)0xff065, 0x42); |
| 174 | /* BIOS Int 11 Handler F000:F84D */ |
| 175 | write_idt_stub((void *)0xff84d, 0x11); |
| 176 | /* BIOS Int 12 Handler F000:F841 */ |
| 177 | write_idt_stub((void *)0xff841, 0x12); |
| 178 | /* BIOS Int 13 Handler F000:EC59 */ |
| 179 | write_idt_stub((void *)0xfec59, 0x13); |
| 180 | /* BIOS Int 14 Handler F000:E739 */ |
| 181 | write_idt_stub((void *)0xfe739, 0x14); |
| 182 | /* BIOS Int 15 Handler F000:F859 */ |
| 183 | write_idt_stub((void *)0xff859, 0x15); |
| 184 | /* BIOS Int 16 Handler F000:E82E */ |
| 185 | write_idt_stub((void *)0xfe82e, 0x16); |
| 186 | /* BIOS Int 17 Handler F000:EFD2 */ |
| 187 | write_idt_stub((void *)0xfefd2, 0x17); |
| 188 | /* ROM BIOS Int 1A Handler F000:FE6E */ |
| 189 | write_idt_stub((void *)0xffe6e, 0x1a); |
| 190 | } |
| 191 | |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 192 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 193 | static u8 vbe_get_mode_info(struct vesa_state *mi) |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 194 | { |
| 195 | u16 buffer_seg; |
| 196 | u16 buffer_adr; |
| 197 | char *buffer; |
| 198 | |
| 199 | debug("VBE: Getting information about VESA mode %04x\n", |
| 200 | mi->video_mode); |
| 201 | buffer = PTR_TO_REAL_MODE(asm_realmode_buffer); |
| 202 | buffer_seg = (((unsigned long)buffer) >> 4) & 0xff00; |
| 203 | buffer_adr = ((unsigned long)buffer) & 0xffff; |
| 204 | |
| 205 | realmode_interrupt(0x10, VESA_GET_MODE_INFO, 0x0000, mi->video_mode, |
| 206 | 0x0000, buffer_seg, buffer_adr); |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 207 | memcpy(mi->mode_info_block, buffer, sizeof(struct vesa_state)); |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 208 | mi->valid = true; |
| 209 | |
| 210 | return 0; |
| 211 | } |
| 212 | |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 213 | static u8 vbe_set_mode(struct vesa_state *mi) |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 214 | { |
Simon Glass | 91ea034 | 2015-01-01 16:18:04 -0700 | [diff] [blame] | 215 | int video_mode = mi->video_mode; |
| 216 | |
| 217 | debug("VBE: Setting VESA mode %#04x\n", video_mode); |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 218 | /* request linear framebuffer mode */ |
Simon Glass | 91ea034 | 2015-01-01 16:18:04 -0700 | [diff] [blame] | 219 | video_mode |= (1 << 14); |
Simon Glass | 6548ce9 | 2015-01-01 16:18:03 -0700 | [diff] [blame] | 220 | /* don't clear the framebuffer, we do that later */ |
Simon Glass | 91ea034 | 2015-01-01 16:18:04 -0700 | [diff] [blame] | 221 | video_mode |= (1 << 15); |
| 222 | realmode_interrupt(0x10, VESA_SET_MODE, video_mode, |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 223 | 0x0000, 0x0000, 0x0000, 0x0000); |
| 224 | |
| 225 | return 0; |
| 226 | } |
| 227 | |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 228 | static void vbe_set_graphics(int vesa_mode, struct vesa_state *mode_info) |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 229 | { |
| 230 | unsigned char *framebuffer; |
| 231 | |
| 232 | mode_info->video_mode = (1 << 14) | vesa_mode; |
| 233 | vbe_get_mode_info(mode_info); |
| 234 | |
Simon Glass | aa0ed9d | 2017-01-16 07:03:42 -0700 | [diff] [blame] | 235 | framebuffer = (unsigned char *)(ulong)mode_info->vesa.phys_base_ptr; |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 236 | debug("VBE: resolution: %dx%d@%d\n", |
| 237 | le16_to_cpu(mode_info->vesa.x_resolution), |
| 238 | le16_to_cpu(mode_info->vesa.y_resolution), |
| 239 | mode_info->vesa.bits_per_pixel); |
| 240 | debug("VBE: framebuffer: %p\n", framebuffer); |
| 241 | if (!framebuffer) { |
| 242 | debug("VBE: Mode does not support linear framebuffer\n"); |
| 243 | return; |
| 244 | } |
| 245 | |
Simon Glass | 91ea034 | 2015-01-01 16:18:04 -0700 | [diff] [blame] | 246 | mode_info->video_mode &= 0x3ff; |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 247 | vbe_set_mode(mode_info); |
| 248 | } |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 249 | #endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */ |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 250 | |
Simon Glass | a063086 | 2015-11-29 13:17:58 -0700 | [diff] [blame] | 251 | void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode, |
Simon Glass | 5b92520 | 2022-07-30 15:52:05 -0600 | [diff] [blame] | 252 | struct vesa_state *mode_info) |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 253 | { |
Simon Glass | a063086 | 2015-11-29 13:17:58 -0700 | [diff] [blame] | 254 | pci_dev_t pcidev = dm_pci_get_bdf(dev); |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 255 | u32 num_dev; |
| 256 | |
| 257 | num_dev = PCI_BUS(pcidev) << 8 | PCI_DEV(pcidev) << 3 | |
| 258 | PCI_FUNC(pcidev); |
| 259 | |
| 260 | /* Needed to avoid exceptions in some ROMs */ |
| 261 | interrupt_init(); |
| 262 | |
| 263 | /* Set up some legacy information in the F segment */ |
| 264 | setup_rombios(); |
| 265 | |
| 266 | /* Set up C interrupt handlers */ |
| 267 | setup_interrupt_handlers(); |
| 268 | |
| 269 | /* Set up real-mode IDT */ |
| 270 | setup_realmode_idt(); |
| 271 | |
| 272 | /* Make sure the code is placed. */ |
| 273 | setup_realmode_code(); |
| 274 | |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 275 | debug("Calling Option ROM at %lx, pci device %#x...", addr, num_dev); |
| 276 | |
| 277 | /* Option ROM entry point is at OPROM start + 3 */ |
| 278 | realmode_call(addr + 0x0003, num_dev, 0xffff, 0x0000, 0xffff, 0x0, |
| 279 | 0x0); |
| 280 | debug("done\n"); |
| 281 | |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 282 | #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 283 | if (vesa_mode != -1) |
| 284 | vbe_set_graphics(vesa_mode, mode_info); |
Bin Meng | c9dba41 | 2018-04-11 22:02:15 -0700 | [diff] [blame] | 285 | #endif |
Simon Glass | b2978d3 | 2014-11-14 20:56:32 -0700 | [diff] [blame] | 286 | } |
| 287 | |
| 288 | asmlinkage int interrupt_handler(u32 intnumber, u32 gsfs, u32 dses, |
| 289 | u32 edi, u32 esi, u32 ebp, u32 esp, |
| 290 | u32 ebx, u32 edx, u32 ecx, u32 eax, |
| 291 | u32 cs_ip, u16 stackflags) |
| 292 | { |
| 293 | u32 ip; |
| 294 | u32 cs; |
| 295 | u32 flags; |
| 296 | int ret = 0; |
| 297 | |
| 298 | ip = cs_ip & 0xffff; |
| 299 | cs = cs_ip >> 16; |
| 300 | flags = stackflags; |
| 301 | |
| 302 | #ifdef CONFIG_REALMODE_DEBUG |
| 303 | debug("oprom: INT# 0x%x\n", intnumber); |
| 304 | debug("oprom: eax: %08x ebx: %08x ecx: %08x edx: %08x\n", |
| 305 | eax, ebx, ecx, edx); |
| 306 | debug("oprom: ebp: %08x esp: %08x edi: %08x esi: %08x\n", |
| 307 | ebp, esp, edi, esi); |
| 308 | debug("oprom: ip: %04x cs: %04x flags: %08x\n", |
| 309 | ip, cs, flags); |
| 310 | debug("oprom: stackflags = %04x\n", stackflags); |
| 311 | #endif |
| 312 | |
| 313 | /* |
| 314 | * Fetch arguments from the stack and put them to a place |
| 315 | * suitable for the interrupt handlers |
| 316 | */ |
| 317 | M.x86.R_EAX = eax; |
| 318 | M.x86.R_ECX = ecx; |
| 319 | M.x86.R_EDX = edx; |
| 320 | M.x86.R_EBX = ebx; |
| 321 | M.x86.R_ESP = esp; |
| 322 | M.x86.R_EBP = ebp; |
| 323 | M.x86.R_ESI = esi; |
| 324 | M.x86.R_EDI = edi; |
| 325 | M.x86.intno = intnumber; |
| 326 | M.x86.R_EIP = ip; |
| 327 | M.x86.R_CS = cs; |
| 328 | M.x86.R_EFLG = flags; |
| 329 | |
| 330 | /* Call the interrupt handler for this interrupt number */ |
| 331 | ret = int_handler[intnumber](); |
| 332 | |
| 333 | /* |
| 334 | * This code is quite strange... |
| 335 | * |
| 336 | * Put registers back on the stack. The assembler code will pop them |
| 337 | * later. We force (volatile!) changing the values of the parameters |
| 338 | * of this function. We know that they stay alive on the stack after |
| 339 | * we leave this function. |
| 340 | */ |
| 341 | *(volatile u32 *)&eax = M.x86.R_EAX; |
| 342 | *(volatile u32 *)&ecx = M.x86.R_ECX; |
| 343 | *(volatile u32 *)&edx = M.x86.R_EDX; |
| 344 | *(volatile u32 *)&ebx = M.x86.R_EBX; |
| 345 | *(volatile u32 *)&esi = M.x86.R_ESI; |
| 346 | *(volatile u32 *)&edi = M.x86.R_EDI; |
| 347 | flags = M.x86.R_EFLG; |
| 348 | |
| 349 | /* Pass success or error back to our caller via the CARRY flag */ |
| 350 | if (ret) { |
| 351 | flags &= ~1; /* no error: clear carry */ |
| 352 | } else { |
| 353 | debug("int%02x call returned error\n", intnumber); |
| 354 | flags |= 1; /* error: set carry */ |
| 355 | } |
| 356 | *(volatile u16 *)&stackflags = flags; |
| 357 | |
| 358 | return ret; |
| 359 | } |