Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2022 NXP |
| 4 | */ |
| 5 | |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 6 | #include <command.h> |
| 7 | #include <cpu_func.h> |
| 8 | #include <hang.h> |
| 9 | #include <image.h> |
| 10 | #include <init.h> |
| 11 | #include <log.h> |
| 12 | #include <spl.h> |
| 13 | #include <asm/global_data.h> |
| 14 | #include <asm/io.h> |
| 15 | #include <asm/arch/imx93_pins.h> |
Mathieu Othacehe | 72c6afe | 2024-02-09 11:30:07 +0100 | [diff] [blame] | 16 | #include <asm/arch/mu.h> |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 17 | #include <asm/arch/clock.h> |
| 18 | #include <asm/arch/sys_proto.h> |
| 19 | #include <asm/mach-imx/boot_mode.h> |
| 20 | #include <asm/mach-imx/mxc_i2c.h> |
| 21 | #include <asm/arch-mx7ulp/gpio.h> |
Mathieu Othacehe | 8bb6ede | 2024-02-26 18:37:18 +0100 | [diff] [blame] | 22 | #include <asm/mach-imx/ele_api.h> |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 23 | #include <asm/mach-imx/syscounter.h> |
Shiji Yang | bb11234 | 2023-08-03 09:47:16 +0800 | [diff] [blame] | 24 | #include <asm/sections.h> |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 25 | #include <dm/uclass.h> |
| 26 | #include <dm/device.h> |
| 27 | #include <dm/uclass-internal.h> |
| 28 | #include <dm/device-internal.h> |
| 29 | #include <linux/delay.h> |
| 30 | #include <asm/arch/clock.h> |
| 31 | #include <asm/arch/ccm_regs.h> |
| 32 | #include <asm/arch/ddr.h> |
| 33 | #include <power/pmic.h> |
| 34 | #include <power/pca9450.h> |
| 35 | #include <asm/arch/trdc.h> |
| 36 | |
| 37 | DECLARE_GLOBAL_DATA_PTR; |
| 38 | |
| 39 | int spl_board_boot_device(enum boot_device boot_dev_spl) |
| 40 | { |
| 41 | return BOOT_DEVICE_BOOTROM; |
| 42 | } |
| 43 | |
| 44 | void spl_board_init(void) |
| 45 | { |
Mathieu Othacehe | 8bb6ede | 2024-02-26 18:37:18 +0100 | [diff] [blame] | 46 | int ret; |
| 47 | |
| 48 | ret = ele_start_rng(); |
| 49 | if (ret) |
| 50 | printf("Fail to start RNG: %d\n", ret); |
| 51 | |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 52 | puts("Normal Boot\n"); |
| 53 | } |
| 54 | |
Peng Fan | ffb8c37 | 2024-09-19 12:01:39 +0800 | [diff] [blame] | 55 | extern struct dram_timing_info dram_timing_1866mts; |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 56 | void spl_dram_init(void) |
| 57 | { |
Peng Fan | ffb8c37 | 2024-09-19 12:01:39 +0800 | [diff] [blame] | 58 | struct dram_timing_info *ptiming = &dram_timing; |
| 59 | |
| 60 | if (is_voltage_mode(VOLT_LOW_DRIVE)) |
| 61 | ptiming = &dram_timing_1866mts; |
| 62 | |
| 63 | printf("DDR: %uMTS\n", ptiming->fsp_msg[0].drate); |
| 64 | ddr_init(ptiming); |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | #if CONFIG_IS_ENABLED(DM_PMIC_PCA9450) |
| 68 | int power_init_board(void) |
| 69 | { |
| 70 | struct udevice *dev; |
| 71 | int ret; |
Peng Fan | 0ddb895 | 2024-09-19 12:01:37 +0800 | [diff] [blame] | 72 | unsigned int val = 0, buck_val; |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 73 | |
| 74 | ret = pmic_get("pmic@25", &dev); |
| 75 | if (ret == -ENODEV) { |
| 76 | puts("No pca9450@25\n"); |
| 77 | return 0; |
| 78 | } |
| 79 | if (ret != 0) |
| 80 | return ret; |
| 81 | |
| 82 | /* BUCKxOUT_DVS0/1 control BUCK123 output */ |
| 83 | pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); |
| 84 | |
Peng Fan | 513d508 | 2023-04-28 12:08:35 +0800 | [diff] [blame] | 85 | /* enable DVS control through PMIC_STBY_REQ */ |
| 86 | pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); |
| 87 | |
Peng Fan | 0ddb895 | 2024-09-19 12:01:37 +0800 | [diff] [blame] | 88 | ret = pmic_reg_read(dev, PCA9450_PWR_CTRL); |
| 89 | if (ret < 0) |
| 90 | return ret; |
| 91 | |
| 92 | val = ret; |
| 93 | |
| 94 | if (is_voltage_mode(VOLT_LOW_DRIVE)) { |
| 95 | buck_val = 0x0c; /* 0.8v for Low drive mode */ |
| 96 | printf("PMIC: Low Drive Voltage Mode\n"); |
| 97 | } else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) { |
| 98 | buck_val = 0x10; /* 0.85v for Nominal drive mode */ |
| 99 | printf("PMIC: Nominal Voltage Mode\n"); |
| 100 | } else { |
| 101 | buck_val = 0x14; /* 0.9v for Over drive mode */ |
| 102 | printf("PMIC: Over Drive Voltage Mode\n"); |
| 103 | } |
| 104 | |
| 105 | if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { |
| 106 | pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val); |
| 107 | pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val); |
Peng Fan | 513d508 | 2023-04-28 12:08:35 +0800 | [diff] [blame] | 108 | } else { |
Peng Fan | 0ddb895 | 2024-09-19 12:01:37 +0800 | [diff] [blame] | 109 | pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val + 0x4); |
| 110 | pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4); |
Peng Fan | 513d508 | 2023-04-28 12:08:35 +0800 | [diff] [blame] | 111 | } |
| 112 | |
Peng Fan | 0ddb895 | 2024-09-19 12:01:37 +0800 | [diff] [blame] | 113 | if (IS_ENABLED(CONFIG_IMX93_EVK_LPDDR4X)) { |
| 114 | /* Set VDDQ to 1.1V from buck2 */ |
| 115 | pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x28); |
| 116 | } |
| 117 | |
Peng Fan | 513d508 | 2023-04-28 12:08:35 +0800 | [diff] [blame] | 118 | /* set standby voltage to 0.65v */ |
Peng Fan | 0ddb895 | 2024-09-19 12:01:37 +0800 | [diff] [blame] | 119 | if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) |
| 120 | pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x0); |
| 121 | else |
| 122 | pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x4); |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 123 | |
| 124 | /* I2C_LT_EN*/ |
| 125 | pmic_reg_write(dev, 0xa, 0x3); |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 126 | return 0; |
| 127 | } |
| 128 | #endif |
| 129 | |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 130 | void board_init_f(ulong dummy) |
| 131 | { |
| 132 | int ret; |
| 133 | |
| 134 | /* Clear the BSS. */ |
| 135 | memset(__bss_start, 0, __bss_end - __bss_start); |
| 136 | |
| 137 | timer_init(); |
| 138 | |
| 139 | arch_cpu_init(); |
| 140 | |
| 141 | board_early_init_f(); |
| 142 | |
| 143 | spl_early_init(); |
| 144 | |
| 145 | preloader_console_init(); |
| 146 | |
Ye Li | 81bfc1a | 2024-04-01 09:41:08 +0800 | [diff] [blame] | 147 | ret = imx9_probe_mu(); |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 148 | if (ret) { |
| 149 | printf("Fail to init Sentinel API\n"); |
| 150 | } else { |
Fabio Estevam | 6748071 | 2024-04-15 18:57:17 -0300 | [diff] [blame] | 151 | debug("SOC: 0x%x\n", gd->arch.soc_rev); |
| 152 | debug("LC: 0x%x\n", gd->arch.lifecycle); |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 153 | } |
Peng Fan | 513d508 | 2023-04-28 12:08:35 +0800 | [diff] [blame] | 154 | |
Ye Li | 66af10a | 2024-09-19 12:01:27 +0800 | [diff] [blame] | 155 | clock_init_late(); |
| 156 | |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 157 | power_init_board(); |
| 158 | |
Ye Li | 66af10a | 2024-09-19 12:01:27 +0800 | [diff] [blame] | 159 | if (!is_voltage_mode(VOLT_LOW_DRIVE)) |
Peng Fan | 513d508 | 2023-04-28 12:08:35 +0800 | [diff] [blame] | 160 | set_arm_clk(get_cpu_speed_grade_hz()); |
Peng Fan | 10fde4e | 2022-07-26 16:41:11 +0800 | [diff] [blame] | 161 | |
Peng Fan | b72606c | 2022-07-26 16:41:10 +0800 | [diff] [blame] | 162 | /* Init power of mix */ |
| 163 | soc_power_init(); |
| 164 | |
| 165 | /* Setup TRDC for DDR access */ |
| 166 | trdc_init(); |
| 167 | |
| 168 | /* DDR initialization */ |
| 169 | spl_dram_init(); |
| 170 | |
| 171 | /* Put M33 into CPUWAIT for following kick */ |
| 172 | ret = m33_prepare(); |
| 173 | if (!ret) |
| 174 | printf("M33 prepare ok\n"); |
| 175 | |
| 176 | board_init_r(NULL, 0); |
| 177 | } |