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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk0aeb8532004-10-10 21:21:55 +00002/*
3 * Copyright 2004 Freescale Semiconductor.
wdenk0aeb8532004-10-10 21:21:55 +00004 */
5
6#ifndef __EEPROM_H_
7#define __EEPROM_H_
8
wdenk0aeb8532004-10-10 21:21:55 +00009/*
10 * EEPROM Board System Register interface.
11 */
12
wdenk0aeb8532004-10-10 21:21:55 +000013/*
14 * CPU Board Revision
15 */
16#define MPC85XX_CPU_BOARD_REV(maj, min) ((((maj)&0xff) << 8) | ((min) & 0xff))
17#define MPC85XX_CPU_BOARD_MAJOR(rev) (((rev) >> 8) & 0xff)
18#define MPC85XX_CPU_BOARD_MINOR(rev) ((rev) & 0xff)
19
20#define MPC85XX_CPU_BOARD_REV_UNKNOWN MPC85XX_CPU_BOARD_REV(0,0)
21#define MPC85XX_CPU_BOARD_REV_1_0 MPC85XX_CPU_BOARD_REV(1,0)
22#define MPC85XX_CPU_BOARD_REV_1_1 MPC85XX_CPU_BOARD_REV(1,1)
23
24/*
25 * Returns CPU board revision register as a 16-bit value with
26 * the Major in the high byte, and Minor in the low byte.
27 */
28extern unsigned int get_cpu_board_revision(void);
29
wdenk0aeb8532004-10-10 21:21:55 +000030#endif /* __CADMUS_H_ */