| developer | 56ed64c | 2022-09-09 19:59:13 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2022 MediaTek Inc. |
| 4 | * Author: Sam Shih <sam.shih@mediatek.com> |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | #include "mt7986.dtsi" |
| 9 | #include <dt-bindings/gpio/gpio.h> |
| 10 | |
| 11 | / { |
| 12 | #address-cells = <1>; |
| 13 | #size-cells = <1>; |
| 14 | model = "mt7986-rfb"; |
| 15 | compatible = "mediatek,mt7986", "mediatek,mt7986-rfb", |
| 16 | "mediatek,mt7986-sd-rfb"; |
| 17 | chosen { |
| 18 | stdout-path = &uart0; |
| 19 | tick-timer = &timer0; |
| 20 | }; |
| 21 | |
| 22 | reg_3p3v: regulator-3p3v { |
| 23 | compatible = "regulator-fixed"; |
| 24 | regulator-name = "fixed-3.3V"; |
| 25 | regulator-min-microvolt = <3300000>; |
| 26 | regulator-max-microvolt = <3300000>; |
| 27 | regulator-boot-on; |
| 28 | regulator-always-on; |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | &uart0 { |
| 33 | status = "okay"; |
| 34 | }; |
| 35 | |
| 36 | &uart1 { |
| 37 | pinctrl-names = "default"; |
| 38 | pinctrl-0 = <&uart1_pins>; |
| 39 | status = "disabled"; |
| 40 | }; |
| 41 | |
| 42 | ð { |
| 43 | status = "okay"; |
| 44 | mediatek,gmac-id = <0>; |
| 45 | phy-mode = "sgmii"; |
| 46 | mediatek,switch = "mt7531"; |
| 47 | reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; |
| 48 | |
| 49 | fixed-link { |
| 50 | speed = <1000>; |
| 51 | full-duplex; |
| 52 | }; |
| 53 | }; |
| 54 | |
| 55 | &pinctrl { |
| 56 | spi_flash_pins: spi0-pins-func-1 { |
| 57 | mux { |
| 58 | function = "flash"; |
| 59 | groups = "spi0", "spi0_wp_hold"; |
| 60 | }; |
| 61 | |
| 62 | conf-pu { |
| 63 | pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; |
| 64 | drive-strength = <MTK_DRIVE_8mA>; |
| 65 | bias-pull-up = <MTK_PUPD_SET_R1R0_11>; |
| 66 | }; |
| 67 | |
| 68 | conf-pd { |
| 69 | pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; |
| 70 | drive-strength = <MTK_DRIVE_8mA>; |
| 71 | bias-pull-down = <MTK_PUPD_SET_R1R0_11>; |
| 72 | }; |
| 73 | }; |
| 74 | |
| 75 | spic_pins: spi1-pins-func-1 { |
| 76 | mux { |
| 77 | function = "spi"; |
| 78 | groups = "spi1_2"; |
| 79 | }; |
| 80 | }; |
| 81 | |
| 82 | uart1_pins: spi1-pins-func-3 { |
| 83 | mux { |
| 84 | function = "uart"; |
| 85 | groups = "uart1_2"; |
| 86 | }; |
| 87 | }; |
| 88 | |
| 89 | pwm_pins: pwm0-pins-func-1 { |
| 90 | mux { |
| 91 | function = "pwm"; |
| 92 | groups = "pwm0"; |
| 93 | }; |
| 94 | }; |
| 95 | |
| 96 | mmc0_pins_default: mmc0default { |
| 97 | mux { |
| 98 | function = "flash"; |
| 99 | groups = "emmc_51"; |
| 100 | }; |
| 101 | |
| 102 | conf-cmd-dat { |
| 103 | pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", |
| 104 | "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", |
| 105 | "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; |
| 106 | input-enable; |
| 107 | drive-strength = <MTK_DRIVE_4mA>; |
| 108 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| 109 | }; |
| 110 | |
| 111 | conf-clk { |
| 112 | pins = "EMMC_CK"; |
| 113 | drive-strength = <MTK_DRIVE_6mA>; |
| 114 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| 115 | }; |
| 116 | |
| 117 | conf-dsl { |
| 118 | pins = "EMMC_DSL"; |
| 119 | bias-pull-down = <MTK_PUPD_SET_R1R0_10>; |
| 120 | }; |
| 121 | |
| 122 | conf-rst { |
| 123 | pins = "EMMC_RSTB"; |
| 124 | drive-strength = <MTK_DRIVE_4mA>; |
| 125 | bias-pull-up = <MTK_PUPD_SET_R1R0_01>; |
| 126 | }; |
| 127 | }; |
| 128 | }; |
| 129 | |
| 130 | &spi0 { |
| 131 | #address-cells = <1>; |
| 132 | #size-cells = <0>; |
| 133 | pinctrl-names = "default"; |
| 134 | pinctrl-0 = <&spi_flash_pins>; |
| 135 | status = "okay"; |
| 136 | must_tx; |
| 137 | enhance_timing; |
| 138 | dma_ext; |
| 139 | ipm_design; |
| 140 | support_quad; |
| 141 | tick_dly = <2>; |
| 142 | sample_sel = <0>; |
| 143 | |
| 144 | spi_nor@0 { |
| 145 | compatible = "jedec,spi-nor"; |
| 146 | reg = <0>; |
| 147 | spi-max-frequency = <52000000>; |
| 148 | }; |
| 149 | |
| 150 | spi_nand@1 { |
| 151 | compatible = "spi-nand"; |
| 152 | reg = <1>; |
| 153 | spi-max-frequency = <52000000>; |
| 154 | }; |
| 155 | }; |
| 156 | |
| 157 | &pwm { |
| 158 | pinctrl-names = "default"; |
| 159 | pinctrl-0 = <&pwm_pins>; |
| 160 | status = "okay"; |
| 161 | }; |
| 162 | |
| 163 | &watchdog { |
| 164 | status = "disabled"; |
| 165 | }; |
| 166 | |
| 167 | &mmc0 { |
| 168 | pinctrl-names = "default"; |
| 169 | pinctrl-0 = <&mmc0_pins_default>; |
| 170 | bus-width = <4>; |
| 171 | max-frequency = <52000000>; |
| 172 | cap-sd-highspeed; |
| 173 | r_smpl = <1>; |
| 174 | vmmc-supply = <®_3p3v>; |
| 175 | vqmmc-supply = <®_3p3v>; |
| 176 | status = "okay"; |
| 177 | }; |