blob: 945ea2c248a2e4c07ca4346a57f06e210906ea47 [file] [log] [blame]
Jean-Christophe PLAGNIOL-VILLARD0134c312009-05-15 23:45:22 +02001/*
2 * (C) Copyright 2002
3 * Lineo, Inc. <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32
33#include <common.h>
34#include <asm/arch/hardware.h>
35
36void board_reset(void) __attribute__((__weak__));
37
38/*
39 * Reset the cpu by setting up the watchdog timer and let him time out
40 * or toggle a GPIO pin on the AT91RM9200DK board
41 */
42void reset_cpu (ulong ignored)
43{
44
45#if defined(CONFIG_AT91RM9200_USART)
46 /*shutdown the console to avoid strange chars during reset */
47 serial_exit();
48#endif
49
50 if (board_reset)
51 board_reset();
52
53 /* this is the way Linux does it */
54
55 /* FIXME:
56 * These defines should be moved into
57 * include/asm-arm/arch-at91rm9200/AT91RM9200.h
58 * as soon as the whitespace fix gets applied.
59 */
60 #define AT91C_ST_RSTEN (0x1 << 16)
61 #define AT91C_ST_EXTEN (0x1 << 17)
62 #define AT91C_ST_WDRST (0x1 << 0)
63 #define ST_WDMR *((unsigned long *)0xfffffd08) /* watchdog mode register */
64 #define ST_CR *((unsigned long *)0xfffffd00) /* system clock control register */
65
66 ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ;
67 ST_CR = AT91C_ST_WDRST;
68
69 while (1);
70 /* Never reached */
71}