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Daniel Hellstromb552dbe2008-03-26 22:51:29 +01001/* Initializes CPU and basic hardware such as memory
2 * controllers, IRQ controller and system timer 0.
3 *
Daniel Hellstrom02e2a842010-01-25 09:54:51 +01004 * (C) Copyright 2007, 2015
5 * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
Daniel Hellstromb552dbe2008-03-26 22:51:29 +01006 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstromb552dbe2008-03-26 22:51:29 +01008 */
9
10#include <common.h>
11#include <asm/asi.h>
12#include <asm/leon.h>
13#include <ambapp.h>
Daniel Hellstrom9d59af92010-01-21 16:09:37 +010014#include <grlib/irqmp.h>
15#include <grlib/gptimer.h>
Francois Retiefd18eb7b2015-10-29 12:55:34 +020016#include <debug_uart.h>
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010017
18#include <config.h>
19
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010020/* Default Plug&Play I/O area */
21#ifndef CONFIG_AMBAPP_IOAREA
22#define CONFIG_AMBAPP_IOAREA AMBA_DEFAULT_IOAREA
23#endif
24
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +020025#define TIMER_BASE_CLK 1000000
26#define US_PER_TICK (1000000 / CONFIG_SYS_HZ)
27
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010028DECLARE_GLOBAL_DATA_PTR;
29
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010030ambapp_dev_irqmp *irqmp = NULL;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010031ambapp_dev_gptimer *gptimer = NULL;
32unsigned int gptimer_irq = 0;
33int leon3_snooping_avail = 0;
34
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010035/*
36 * Breath some life into the CPU...
37 *
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010038 * Run from FLASH/PROM:
Loïc Minier5d0569a2011-02-03 22:04:26 +010039 * - until memory controller is set up, only registers available
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010040 * - memory controller has already been setup up, stack can be used
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010041 * - no global variables available for writing
Loïc Minier5d0569a2011-02-03 22:04:26 +010042 * - constants available
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010043 */
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010044void cpu_init_f(void)
45{
Francois Retiefd18eb7b2015-10-29 12:55:34 +020046#ifdef CONFIG_DEBUG_UART
47 debug_uart_init();
48#endif
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010049}
50
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010051/* Routine called from start.S,
52 *
53 * Run from FLASH/PROM:
54 * - memory controller has already been setup up, stack can be used
55 * - global variables available for read/writing
56 * - constants avaiable
57 */
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010058void cpu_init_f2(void)
59{
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010060 /* Initialize the AMBA Plug & Play bus structure, the bus
61 * structure represents the AMBA bus that the CPU is located at.
62 */
63 ambapp_bus_init(CONFIG_AMBAPP_IOAREA, CONFIG_SYS_CLK_FREQ, &ambapp_plb);
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010064}
65
Francois Retiefe3051d92015-10-28 14:29:32 +020066int arch_cpu_init(void)
67{
68 gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
69 gd->bus_clk = CONFIG_SYS_CLK_FREQ;
70 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
71
72 return 0;
73}
74
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010075/*
76 * initialize higher level parts of CPU like time base and timers
77 */
78int cpu_init_r(void)
79{
80 ambapp_apbdev apbdev;
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010081 int index, cpu;
82 ambapp_dev_gptimer *timer = NULL;
83 unsigned int bus_freq;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010084
85 /*
86 * Find AMBA APB IRQMP Controller,
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010087 */
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010088 if (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER,
89 GAISLER_IRQMP, 0, &apbdev) != 1) {
90 panic("%s: IRQ controller not found\n", __func__);
91 return -1;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010092 }
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010093 irqmp = (ambapp_dev_irqmp *)apbdev.address;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +010094
Daniel Hellstrom02e2a842010-01-25 09:54:51 +010095 /* initialize the IRQMP */
96 irqmp->ilevel = 0xf; /* all IRQ off */
97 irqmp->iforce = 0;
98 irqmp->ipend = 0;
99 irqmp->iclear = 0xfffe; /* clear all old pending interrupts */
100 for (cpu = 0; cpu < 16; cpu++) {
101 /* mask and clear force for all IRQs on CPU[N] */
102 irqmp->cpu_mask[cpu] = 0;
103 irqmp->cpu_force[cpu] = 0;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100104 }
105
Daniel Hellstrom02e2a842010-01-25 09:54:51 +0100106 /* timer */
107 index = 0;
108 while (ambapp_apb_find(&ambapp_plb, VENDOR_GAISLER, GAISLER_GPTIMER,
109 index, &apbdev) == 1) {
110 timer = (ambapp_dev_gptimer *)apbdev.address;
111 if (gptimer == NULL) {
112 gptimer = timer;
113 gptimer_irq = apbdev.irq;
114 }
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100115
Daniel Hellstrom02e2a842010-01-25 09:54:51 +0100116 /* Different buses may have different frequency, the
117 * frequency of the bus tell in which frequency the timer
118 * prescaler operates.
119 */
120 bus_freq = ambapp_bus_freq(&ambapp_plb, apbdev.ahb_bus_index);
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100121
Daniel Hellstrom02e2a842010-01-25 09:54:51 +0100122 /* initialize prescaler common to all timers to 1MHz */
123 timer->scalar = timer->scalar_reload =
124 (((bus_freq / 1000) + 500) / 1000) - 1;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100125
Daniel Hellstrom02e2a842010-01-25 09:54:51 +0100126 index++;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100127 }
Daniel Hellstrom02e2a842010-01-25 09:54:51 +0100128 if (!gptimer) {
129 printf("%s: gptimer not found!\n", __func__);
130 return 1;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100131 }
Daniel Hellstrom02e2a842010-01-25 09:54:51 +0100132 return 0;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100133}
134
135/* Uses Timer 0 to get accurate
136 * pauses. Max 2 raised to 32 ticks
137 *
138 */
139void cpu_wait_ticks(unsigned long ticks)
140{
141 unsigned long start = get_timer(0);
142 while (get_timer(start) < ticks) ;
143}
144
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200145/* initiate and setup timer0 interrupt to configured HZ. Base clock is 1MHz.
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100146 * Return irq number for timer int or a negative number for
147 * dealing with self
148 */
149int timer_interrupt_init_cpu(void)
150{
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200151 /* SYS_HZ ticks per second */
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100152 gptimer->e[0].val = 0;
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200153 gptimer->e[0].rld = (TIMER_BASE_CLK / CONFIG_SYS_HZ) - 1;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100154 gptimer->e[0].ctrl =
Daniel Hellstrom9d59af92010-01-21 16:09:37 +0100155 (GPTIMER_CTRL_EN | GPTIMER_CTRL_RS |
156 GPTIMER_CTRL_LD | GPTIMER_CTRL_IE);
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100157
158 return gptimer_irq;
159}
160
Daniel Hellstrom9c2a0f22014-05-08 18:52:37 +0200161ulong get_tbclk(void)
162{
163 return TIMER_BASE_CLK;
164}
165
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100166/*
167 * This function is intended for SHORT delays only.
168 */
169unsigned long cpu_usec2ticks(unsigned long usec)
170{
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200171 if (usec < US_PER_TICK)
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100172 return 1;
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200173 return usec / US_PER_TICK;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100174}
175
176unsigned long cpu_ticks2usec(unsigned long ticks)
177{
Daniel Hellstrom8f7557d2014-05-08 19:16:14 +0200178 return ticks * US_PER_TICK;
Daniel Hellstromb552dbe2008-03-26 22:51:29 +0100179}