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Peng Fane2fd36cc2016-02-03 10:06:07 +08001/*
2 * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __DRIVERS_PINCTRL_IMX_H
8#define __DRIVERS_PINCTRL_IMX_H
9
10/**
11 * @base: the address to the controller in virtual memory
12 * @input_sel_base: the address of the select input in virtual memory.
13 * @flags: flags specific for each soc
14 */
15struct imx_pinctrl_soc_info {
16 void __iomem *base;
17 void __iomem *input_sel_base;
18 unsigned int flags;
19};
20
21/**
22 * @dev: a pointer back to containing device
23 * @info: the soc info
24 */
25struct imx_pinctrl_priv {
26 struct udevice *dev;
27 struct imx_pinctrl_soc_info *info;
28};
29
30extern const struct pinctrl_ops imx_pinctrl_ops;
31
32#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
33#define IMX_PAD_SION 0x40000000 /* set SION */
34
35/*
36 * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
37 * 1 u32 CONFIG, so 24 types in total for each pin.
38 */
39#define FSL_PIN_SIZE 24
40#define SHARE_FSL_PIN_SIZE 20
41
42#define SHARE_MUX_CONF_REG 0x1
43#define ZERO_OFFSET_VALID 0x2
44
45#define IOMUXC_CONFIG_SION (0x1 << 4)
46
47int imx_pinctrl_probe(struct udevice *dev, struct imx_pinctrl_soc_info *info);
48
49int imx_pinctrl_remove(struct udevice *dev);
50#endif /* __DRIVERS_PINCTRL_IMX_H */