Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 Stefan Roese <sr@denx.de> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 7 | #ifndef _CONFIG_MVEBU_ARMADA_8K_H |
| 8 | #define _CONFIG_MVEBU_ARMADA_8K_H |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 9 | |
| 10 | /* |
| 11 | * High Level Configuration Options (easy to change) |
| 12 | */ |
| 13 | #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ |
| 14 | |
| 15 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 16 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 17 | /* additions for new ARM relocation support */ |
| 18 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 |
| 19 | |
| 20 | #define CONFIG_NR_DRAM_BANKS 1 |
| 21 | |
| 22 | /* auto boot */ |
| 23 | #define CONFIG_PREBOOT |
| 24 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 25 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ |
| 26 | 115200, 230400, 460800, 921600 } |
| 27 | |
| 28 | /* |
| 29 | * For booting Linux, the board info and command line data |
| 30 | * have to be in the first 8 MB of memory, since this is |
| 31 | * the maximum mapped by the Linux kernel during initialization. |
| 32 | */ |
| 33 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 34 | #define CONFIG_INITRD_TAG /* enable INITRD tag */ |
| 35 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ |
| 36 | |
| 37 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 38 | |
| 39 | /* |
| 40 | * Size of malloc() pool |
| 41 | */ |
| 42 | #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */ |
| 43 | |
| 44 | /* |
| 45 | * Other required minimal configurations |
| 46 | */ |
| 47 | #define CONFIG_SYS_LONGHELP |
| 48 | #define CONFIG_AUTO_COMPLETE |
| 49 | #define CONFIG_CMDLINE_EDITING |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 50 | #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 51 | #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ |
| 52 | #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ |
| 53 | #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ |
| 54 | #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ |
| 55 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
| 56 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 57 | #define CONFIG_SYS_ALT_MEMTEST |
| 58 | |
| 59 | /* End of 16M scrubbed by training in bootrom */ |
| 60 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) |
| 61 | |
| 62 | /* |
| 63 | * SPI Flash configuration |
| 64 | */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 65 | #define CONFIG_ENV_SPI_BUS 0 |
| 66 | #define CONFIG_ENV_SPI_CS 0 |
| 67 | |
| 68 | /* SPI NOR flash default params, used by sf commands */ |
| 69 | #define CONFIG_SF_DEFAULT_SPEED 1000000 |
| 70 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
| 71 | #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE |
| 72 | |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 73 | #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */ |
| 74 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ |
| 75 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ |
| 76 | |
Konstantin Porotchkin | 0edf772 | 2017-04-05 18:22:33 +0300 | [diff] [blame] | 77 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 78 | #define CONFIG_SYS_NAND_MAX_CHIPS 1 |
| 79 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 80 | #define CONFIG_SYS_NAND_USE_FLASH_BBT |
| 81 | |
Stefan Roese | 97c3ba0 | 2017-02-20 12:25:26 +0100 | [diff] [blame] | 82 | /* |
| 83 | * Ethernet Driver configuration |
| 84 | */ |
| 85 | #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ |
Stefan Roese | 97c3ba0 | 2017-02-20 12:25:26 +0100 | [diff] [blame] | 86 | #define CONFIG_ARP_TIMEOUT 200 |
| 87 | #define CONFIG_NET_RETRY_COUNT 50 |
| 88 | |
Bin Meng | abe4026 | 2017-07-19 21:50:06 +0800 | [diff] [blame] | 89 | #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 90 | |
| 91 | /* USB ethernet */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 92 | |
| 93 | /* |
| 94 | * SATA/SCSI/AHCI configuration |
| 95 | */ |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 96 | #define CONFIG_SCSI_AHCI_PLAT |
Stefan Roese | 7be1b9b | 2016-05-25 08:21:21 +0200 | [diff] [blame] | 97 | #define CONFIG_LBA48 |
| 98 | #define CONFIG_SYS_64BIT_LBA |
| 99 | |
| 100 | #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 |
| 101 | #define CONFIG_SYS_SCSI_MAX_LUN 1 |
| 102 | #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ |
| 103 | CONFIG_SYS_SCSI_MAX_LUN) |
| 104 | |
Stefan Roese | c20e9d5 | 2016-10-27 13:36:45 +0200 | [diff] [blame] | 105 | /* |
| 106 | * PCI configuration |
| 107 | */ |
| 108 | #ifdef CONFIG_PCIE_DW_MVEBU |
| 109 | #define CONFIG_E1000 |
Stefan Roese | c20e9d5 | 2016-10-27 13:36:45 +0200 | [diff] [blame] | 110 | #endif |
| 111 | |
Stefan Roese | 5c806f1 | 2016-10-25 10:56:19 +0200 | [diff] [blame] | 112 | #endif /* _CONFIG_MVEBU_ARMADA_8K_H */ |