| Gabriel Huau | f813548 | 2015-05-25 22:27:37 -0700 | [diff] [blame] | 1 | Intel x86 PINCTRL/GPIO controller |
| 2 | |
| 3 | Pin-muxing on x86 can be described with a node for the PINCTRL master |
| 4 | node and a set of child nodes for each pin on the SoC. |
| 5 | |
| 6 | The PINCTRL master node requires the following properties: |
| 7 | - compatible : "intel,x86-pinctrl" |
| 8 | |
| 9 | Pin nodes must be children of the pinctrl master node and can |
| 10 | contain the following properties: |
| 11 | - pad-offset - (required) offset in the IOBASE for the pin to configured. |
| 12 | - gpio-offset - (required) offset in the GPIOBASE for the pin to configured and |
| 13 | also the bit shift in this register. |
| 14 | - mode-gpio - (optional) standalone property to force the pin into GPIO mode. |
| 15 | - mode-func - (optional) function number to assign to the pin. if 'mode-gpio' |
| 16 | is set, this property will be ignored. |
| 17 | in case of 'mode-gpio' property set: |
| 18 | - output-value - (optional) this set the default output value of the GPIO. |
| 19 | - direction - (optional) this set the direction of the gpio. |
| 20 | - pull-str - (optional) this set the pull strength of the pin. |
| 21 | - pull-assign - (optional) this set the pull assignement (up/down) of the pin. |
| 22 | |
| 23 | Example: |
| 24 | |
| 25 | pin_usb_host_en0@0 { |
| 26 | gpio-offset = <0x80 8>; |
| 27 | pad-offset = <0x260>; |
| 28 | mode-gpio; |
| 29 | output-value = <1>; |
| 30 | direction = <PIN_OUTPUT>; |
| 31 | }; |