blob: 6a6c2f2414dc05284d889edd578b09d04508a191 [file] [log] [blame]
developerf4a079c2018-11-15 10:07:52 +08001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Configuration for MediaTek MT7629 SoC
4 *
5 * Copyright (C) 2018 MediaTek Inc.
6 * Author: Ryder Lee <ryder.lee@mediatek.com>
7 */
8
9#ifndef __MT7629_H
10#define __MT7629_H
11
12#include <linux/sizes.h>
13
14/* Miscellaneous configurable options */
15#define CONFIG_SETUP_MEMORY_TAGS
16#define CONFIG_INITRD_TAG
17#define CONFIG_CMDLINE_TAG
18
19#define CONFIG_SYS_MAXARGS 8
20#define CONFIG_SYS_BOOTM_LEN SZ_64M
21#define CONFIG_SYS_CBSIZE SZ_1K
22#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
23 sizeof(CONFIG_SYS_PROMPT) + 16)
24
25/* Size of malloc() pool */
26#define CONFIG_SYS_MALLOC_LEN SZ_4M
developerb8de3ee2018-12-20 16:12:57 +080027#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
developerf4a079c2018-11-15 10:07:52 +080028
29/* Environment */
developerf4a079c2018-11-15 10:07:52 +080030/* Allow to overwrite serial and ethaddr */
31#define CONFIG_ENV_OVERWRITE
32
33/* Defines for SPL */
34#define CONFIG_SPL_STACK 0x106000
developerf4a079c2018-11-15 10:07:52 +080035#define CONFIG_SPL_MAX_SIZE SZ_64K
36#define CONFIG_SPL_MAX_FOOTPRINT SZ_64K
37#define CONFIG_SPL_PAD_TO 0x10000
38
39#define CONFIG_SPI_ADDR 0x30000000
developerf4a079c2018-11-15 10:07:52 +080040#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
41
42/* SPL -> Uboot */
developerf4a079c2018-11-15 10:07:52 +080043#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
44 GENERATED_GBL_DATA_SIZE)
45
46/* UBoot -> Kernel */
47#define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000
48#define CONFIG_LOADADDR 0x42007f1c
49#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
50
51/* DRAM */
52#define CONFIG_SYS_SDRAM_BASE 0x40000000
53
developerb8de3ee2018-12-20 16:12:57 +080054/* Ethernet */
55#define CONFIG_IPADDR 192.168.1.1
56#define CONFIG_SERVERIP 192.168.1.2
57
developerf4a079c2018-11-15 10:07:52 +080058#endif