Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
Dave Gerlach | d712b36 | 2021-05-11 10:22:11 -0500 | [diff] [blame] | 2 | /* |
| 3 | * Cadence DDR Driver |
| 4 | * |
| 5 | * Copyright (C) 2012-2021 Cadence Design Systems, Inc. |
| 6 | * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/ |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 7 | */ |
Dave Gerlach | d712b36 | 2021-05-11 10:22:11 -0500 | [diff] [blame] | 8 | |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 9 | #ifndef LPDDR4_STRUCTS_IF_H |
| 10 | #define LPDDR4_STRUCTS_IF_H |
| 11 | |
| 12 | #include <linux/types.h> |
| 13 | #include "lpddr4_if.h" |
| 14 | |
Dave Gerlach | d712b36 | 2021-05-11 10:22:11 -0500 | [diff] [blame] | 15 | struct lpddr4_config_s { |
| 16 | struct lpddr4_ctlregs_s *ctlbase; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 17 | lpddr4_infocallback infohandler; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 18 | lpddr4_ctlcallback ctlinterrupthandler; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 19 | lpddr4_phyindepcallback phyindepinterrupthandler; |
| 20 | }; |
| 21 | |
Dave Gerlach | d712b36 | 2021-05-11 10:22:11 -0500 | [diff] [blame] | 22 | struct lpddr4_privatedata_s { |
| 23 | struct lpddr4_ctlregs_s *ctlbase; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 24 | lpddr4_infocallback infohandler; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 25 | lpddr4_ctlcallback ctlinterrupthandler; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 26 | lpddr4_phyindepcallback phyindepinterrupthandler; |
Aswath Govindraju | 7bd8844 | 2022-01-25 20:56:28 +0530 | [diff] [blame] | 27 | void *ddr_instance; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 28 | }; |
| 29 | |
Dave Gerlach | d712b36 | 2021-05-11 10:22:11 -0500 | [diff] [blame] | 30 | struct lpddr4_debuginfo_s { |
| 31 | u8 pllerror; |
| 32 | u8 iocaliberror; |
| 33 | u8 rxoffseterror; |
| 34 | u8 catraingerror; |
| 35 | u8 wrlvlerror; |
| 36 | u8 gatelvlerror; |
| 37 | u8 readlvlerror; |
| 38 | u8 dqtrainingerror; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 39 | }; |
| 40 | |
Dave Gerlach | d712b36 | 2021-05-11 10:22:11 -0500 | [diff] [blame] | 41 | struct lpddr4_fspmoderegs_s { |
| 42 | u8 mr1data_fn[LPDDR4_INTR_MAX_CS]; |
| 43 | u8 mr2data_fn[LPDDR4_INTR_MAX_CS]; |
| 44 | u8 mr3data_fn[LPDDR4_INTR_MAX_CS]; |
| 45 | u8 mr11data_fn[LPDDR4_INTR_MAX_CS]; |
| 46 | u8 mr12data_fn[LPDDR4_INTR_MAX_CS]; |
| 47 | u8 mr13data_fn[LPDDR4_INTR_MAX_CS]; |
| 48 | u8 mr14data_fn[LPDDR4_INTR_MAX_CS]; |
| 49 | u8 mr22data_fn[LPDDR4_INTR_MAX_CS]; |
Kevin Scholz | 521a4ef | 2019-10-07 19:26:36 +0530 | [diff] [blame] | 50 | }; |
| 51 | |
| 52 | #endif /* LPDDR4_STRUCTS_IF_H */ |