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Eric Benard2e66f3b2014-04-04 19:05:55 +02001/*
2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
4 *
5 * Configuration settings for the Embest RIoTboard
6 *
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __RIOTBOARD_CONFIG_H
14#define __RIOTBOARD_CONFIG_H
15
Eric Benard2e66f3b2014-04-04 19:05:55 +020016#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -060017#define CONSOLE_DEV "ttymxc1"
Eric Benard2e66f3b2014-04-04 19:05:55 +020018#define CONFIG_MMCROOT "/dev/mmcblk1p2"
19
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
Adrian Alonsoce08c362015-09-02 13:54:13 -050022#define CONFIG_IMX_THERMAL
Eric Benard2e66f3b2014-04-04 19:05:55 +020023
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
26
Eric Benard2e66f3b2014-04-04 19:05:55 +020027#define CONFIG_MXC_UART
28
Eric Benard2e66f3b2014-04-04 19:05:55 +020029/* I2C Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020030#define CONFIG_SYS_I2C
31#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020032#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
33#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070034#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard2e66f3b2014-04-04 19:05:55 +020035#define CONFIG_SYS_I2C_SPEED 100000
36
37/* USB Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020038#define CONFIG_USB_EHCI
39#define CONFIG_USB_EHCI_MX6
Eric Benard2e66f3b2014-04-04 19:05:55 +020040#define CONFIG_USB_HOST_ETHER
41#define CONFIG_USB_ETHER_ASIX
42#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
43#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
44#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
45#define CONFIG_MXC_USB_FLAGS 0
46
47/* MMC Configs */
Eric Benard2e66f3b2014-04-04 19:05:55 +020048#define CONFIG_SYS_FSL_ESDHC_ADDR 0
49
Eric Benard2e66f3b2014-04-04 19:05:55 +020050#define CONFIG_FEC_MXC
51#define CONFIG_MII
52#define IMX_FEC_BASE ENET_BASE_ADDR
53#define CONFIG_FEC_XCV_TYPE RGMII
54#define CONFIG_ETHPRIME "FEC"
55#define CONFIG_FEC_MXC_PHYADDR 4
56
57#define CONFIG_PHYLIB
58#define CONFIG_PHY_ATHEROS
59
Eric Benard2e66f3b2014-04-04 19:05:55 +020060#ifdef CONFIG_CMD_SF
Eric Benard2e66f3b2014-04-04 19:05:55 +020061#define CONFIG_MXC_SPI
62#define CONFIG_SF_DEFAULT_BUS 0
Nikita Kiryanov00cd7382014-08-20 15:08:50 +030063#define CONFIG_SF_DEFAULT_CS 0
Eric Benard2e66f3b2014-04-04 19:05:55 +020064#define CONFIG_SF_DEFAULT_SPEED 20000000
65#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
66#endif
67
Eric Benard2e66f3b2014-04-04 19:05:55 +020068#define CONFIG_CMD_BMODE
Eric Benard2e66f3b2014-04-04 19:05:55 +020069
Eric Benard2e66f3b2014-04-04 19:05:55 +020070#define CONFIG_ARP_TIMEOUT 200UL
71
Eric Benard2e66f3b2014-04-04 19:05:55 +020072/* Print Buffer Size */
73#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Eric Benard2e66f3b2014-04-04 19:05:55 +020074
75#define CONFIG_SYS_MEMTEST_START 0x10000000
76#define CONFIG_SYS_MEMTEST_END 0x10010000
77#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
78
Eric Benard2e66f3b2014-04-04 19:05:55 +020079/* Physical Memory Map */
80#define CONFIG_NR_DRAM_BANKS 1
81#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
82
83#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
84#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
85#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
86
87#define CONFIG_SYS_INIT_SP_OFFSET \
88 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
89#define CONFIG_SYS_INIT_SP_ADDR \
90 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
91
Peter Robinson4b671502015-05-22 17:30:45 +010092/* Environment organization */
Eric Benard2e66f3b2014-04-04 19:05:55 +020093#define CONFIG_ENV_SIZE (8 * 1024)
94
95#if defined(CONFIG_ENV_IS_IN_MMC)
96/* RiOTboard */
Iain Patone90c9ab2014-12-14 14:51:46 +000097#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +020098#define CONFIG_SYS_FSL_USDHC_NUM 3
99#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
100#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
101#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
102#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
103/* MarSBoard */
Iain Patone90c9ab2014-12-14 14:51:46 +0000104#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard2e66f3b2014-04-04 19:05:55 +0200105#define CONFIG_SYS_FSL_USDHC_NUM 2
106#define CONFIG_ENV_OFFSET (768 * 1024)
107#define CONFIG_ENV_SECT_SIZE (8 * 1024)
108#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
109#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
110#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
111#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
112#endif
113
Eric Benard2e66f3b2014-04-04 19:05:55 +0200114/* Framebuffer */
Eric Benard2e66f3b2014-04-04 19:05:55 +0200115#define CONFIG_VIDEO_IPUV3
Eric Benard2e66f3b2014-04-04 19:05:55 +0200116#define CONFIG_VIDEO_BMP_RLE8
117#define CONFIG_SPLASH_SCREEN
118#define CONFIG_SPLASH_SCREEN_ALIGN
119#define CONFIG_BMP_16BPP
120#define CONFIG_VIDEO_LOGO
121#define CONFIG_VIDEO_BMP_LOGO
122#define CONFIG_IPUV3_CLK 260000000
123#define CONFIG_IMX_HDMI
124#define CONFIG_IMX_VIDEO_SKIP
125
Iain Paton2e891152014-12-14 14:51:32 +0000126#include <config_distro_defaults.h>
Peter Robinsonbe6c5f12015-05-22 17:30:52 +0100127#include "mx6_common.h"
Iain Paton2e891152014-12-14 14:51:32 +0000128
Iain Patone90c9ab2014-12-14 14:51:46 +0000129/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
130 * 1M script, 1M pxe and the ramdisk at the end */
131#define MEM_LAYOUT_ENV_SETTINGS \
132 "bootm_size=0x10000000\0" \
133 "kernel_addr_r=0x12000000\0" \
134 "fdt_addr_r=0x13000000\0" \
135 "scriptaddr=0x13100000\0" \
136 "pxefile_addr_r=0x13200000\0" \
137 "ramdisk_addr_r=0x13300000\0"
138
139#define BOOT_TARGET_DEVICES(func) \
140 func(MMC, mmc, 0) \
141 func(MMC, mmc, 1) \
142 func(MMC, mmc, 2) \
143 func(USB, usb, 0) \
144 func(PXE, pxe, na) \
145 func(DHCP, dhcp, na)
146
147#include <config_distro_bootcmd.h>
148
149#define CONSOLE_STDIN_SETTINGS \
150 "stdin=serial\0"
151
152#define CONSOLE_STDOUT_SETTINGS \
153 "stdout=serial\0" \
154 "stderr=serial\0"
155
156#define CONSOLE_ENV_SETTINGS \
157 CONSOLE_STDIN_SETTINGS \
158 CONSOLE_STDOUT_SETTINGS
159
160#define CONFIG_EXTRA_ENV_SETTINGS \
161 CONSOLE_ENV_SETTINGS \
162 MEM_LAYOUT_ENV_SETTINGS \
163 "fdtfile=" CONFIG_FDTFILE "\0" \
164 BOOTENV
165
Eric Benard2e66f3b2014-04-04 19:05:55 +0200166#endif /* __RIOTBOARD_CONFIG_H */