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Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +01001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +01004 * Lead Tech Design <www.leadtechdesign.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +01007 */
8
9#include <common.h>
Xu, Hong16c092b2011-08-01 03:56:32 +000010#include <asm/io.h>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010011#include <asm/arch/at91_common.h>
12#include <asm/arch/at91_pmc.h>
13#include <asm/arch/gpio.h>
Xu, Hong16c092b2011-08-01 03:56:32 +000014
15/*
16 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
17 * peripheral pins. Good to have if hardware is soldered optionally
18 * or in case of SPI no slave is selected. Avoid lines to float
19 * needlessly. Use a short local PUP define.
20 *
21 * Due to errata "TXD floats when CTS is inactive" pullups are always
22 * on for TXD pins.
23 */
24#ifdef CONFIG_AT91_GPIO_PULLUP
25# define PUP CONFIG_AT91_GPIO_PULLUP
26#else
27# define PUP 0
28#endif
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010029
30void at91_serial0_hw_init(void)
31{
Xu, Hong16c092b2011-08-01 03:56:32 +000032 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010033
Jens Scharsigb49d15c2010-02-03 22:46:46 +010034 at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */
Xu, Hong16c092b2011-08-01 03:56:32 +000035 at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* RXD0 */
36 writel(1 << ATMEL_ID_USART0, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010037}
38
39void at91_serial1_hw_init(void)
40{
Xu, Hong16c092b2011-08-01 03:56:32 +000041 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010042
Jens Scharsigb49d15c2010-02-03 22:46:46 +010043 at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */
Xu, Hong16c092b2011-08-01 03:56:32 +000044 at91_set_a_periph(AT91_PIO_PORTA, 12, PUP); /* RXD1 */
45 writel(1 << ATMEL_ID_USART1, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010046}
47
48void at91_serial2_hw_init(void)
49{
Xu, Hong16c092b2011-08-01 03:56:32 +000050 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010051
Jens Scharsigb49d15c2010-02-03 22:46:46 +010052 at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */
Xu, Hong16c092b2011-08-01 03:56:32 +000053 at91_set_a_periph(AT91_PIO_PORTA, 14, PUP); /* RXD2 */
54 writel(1 << ATMEL_ID_USART2, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010055}
56
Xu, Hong16c092b2011-08-01 03:56:32 +000057void at91_seriald_hw_init(void)
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010058{
Xu, Hong16c092b2011-08-01 03:56:32 +000059 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010060
Xu, Hong16c092b2011-08-01 03:56:32 +000061 at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* DRXD */
Jens Scharsigb49d15c2010-02-03 22:46:46 +010062 at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */
Xu, Hong16c092b2011-08-01 03:56:32 +000063 writel(1 << ATMEL_ID_SYS, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010064}
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020065
Xu, Hong16c092b2011-08-01 03:56:32 +000066#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020067void at91_spi0_hw_init(unsigned long cs_mask)
68{
Xu, Hong16c092b2011-08-01 03:56:32 +000069 at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
Jens Scharsiga4db1ca2010-02-03 22:46:58 +010070
Xu, Hong16c092b2011-08-01 03:56:32 +000071 at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* SPI0_MISO */
72 at91_set_a_periph(AT91_PIO_PORTA, 26, PUP); /* SPI0_MOSI */
73 at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* SPI0_SPCK */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020074
75 /* Enable clock */
Xu, Hong16c092b2011-08-01 03:56:32 +000076 writel(1 << ATMEL_ID_SPI, &pmc->pcer);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020077
78 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010079 at91_set_a_periph(AT91_PIO_PORTA, 28, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020080 }
81 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010082 at91_set_b_periph(AT91_PIO_PORTB, 7, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020083 }
84 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010085 at91_set_a_periph(AT91_PIO_PORTD, 8, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020086 }
87 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010088 at91_set_b_periph(AT91_PIO_PORTD, 9, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020089 }
90 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010091 at91_set_pio_output(AT91_PIO_PORTA, 28, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020092 }
93 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010094 at91_set_pio_output(AT91_PIO_PORTB, 7, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020095 }
96 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010097 at91_set_pio_output(AT91_PIO_PORTD, 8, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020098 }
99 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +0100100 at91_set_pio_output(AT91_PIO_PORTD, 9, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +0200101 }
102}
103#endif
Wu, Joshb12259b2015-02-02 17:51:00 +0800104
105#ifdef CONFIG_GENERIC_ATMEL_MCI
106void at91_mci_hw_init(void)
107{
108 struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
109
110 at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* MCI CLK */
111 at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* MCI CDA */
112 at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* MCI DA0 */
113 at91_set_a_periph(AT91_PIO_PORTA, 3, 0); /* MCI DA1 */
114 at91_set_a_periph(AT91_PIO_PORTA, 4, 0); /* MCI DA2 */
115 at91_set_a_periph(AT91_PIO_PORTA, 5, 0); /* MCI DA3 */
116
117 /* Enable clock */
118 writel(1 << ATMEL_ID_MCI, &pmc->pcer);
119}
120#endif