Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / e1e85444e75b0bd95b43e8c908bc573f3063e5f2 / . / configs / at91sam9g20ek_dataflash_cs1_defconfig
blob: b452a5b90c28bda8343bf44c668b4434cbfc6454 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame^]2CONFIG_SKIP_LOWLEVEL_INIT=y
Adam Fordd36b1022019-08-14 08:29:25 -0500[diff] [blame]3CONFIG_ARCH_CPU_INIT=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]4CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x21f00000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]6CONFIG_TARGET_AT91SAM9260EK=y
Wenyou Yang9c4fbd52017-04-18 15:18:47 +0800[diff] [blame]7CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]8CONFIG_NR_DRAM_BANKS=1
Markus Klotzbuecher7bd60e62019-05-15 15:15:54 +0200[diff] [blame]9CONFIG_ENV_SIZE=0x4200
10CONFIG_ENV_OFFSET=0x4200
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]11CONFIG_ENV_SECT_SIZE=0x210
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]12CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_DEBUG_UART_BOARD_INIT=y
15CONFIG_DEBUG_UART_BASE=0xfffff200
16CONFIG_DEBUG_UART_CLOCK=132000000
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]17CONFIG_DEBUG_UART=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]18CONFIG_SYS_LOAD_ADDR=0x22000000
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]19CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]20CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]21CONFIG_USE_BOOTARGS=y
22CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]23# CONFIG_DISPLAY_BOARDINFO is not set
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]24CONFIG_SYS_PROMPT="U-Boot> "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]25# CONFIG_CMD_BDI is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]26CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]27# CONFIG_CMD_IMI is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]28# CONFIG_CMD_LOADS is not set
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]29CONFIG_CMD_NAND=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]30# CONFIG_CMD_SOURCE is not set
31# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]32CONFIG_CMD_DHCP=y
33CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]34CONFIG_CMD_FAT=y
Wenyou Yang9c4fbd52017-04-18 15:18:47 +0800[diff] [blame]35CONFIG_OF_CONTROL=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]36CONFIG_ENV_IS_IN_SPI_FLASH=y
Patrick Delaunayf8e932e2019-02-27 15:20:38 +0100[diff] [blame]37CONFIG_USE_ENV_SPI_MAX_HZ=y
38CONFIG_ENV_SPI_MAX_HZ=15000000
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]39CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Wenyou Yang9c4fbd52017-04-18 15:18:47 +0800[diff] [blame]40CONFIG_DM=y
41CONFIG_CLK=y
42CONFIG_CLK_AT91=y
Wenyou Yang9c4fbd52017-04-18 15:18:47 +0800[diff] [blame]43CONFIG_AT91_GPIO=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]44# CONFIG_MMC is not set
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]45CONFIG_MTD=y
Miquel Raynald0935362019-10-03 19:50:03 +0200[diff] [blame]46CONFIG_MTD_RAW_NAND=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]47CONFIG_NAND_ATMEL=y
Wenyou.Yang@microchip.come4ac71b2017-07-21 13:40:11 +0800[diff] [blame]48CONFIG_DM_SPI_FLASH=y
Wenyou.Yang@microchip.come4ac71b2017-07-21 13:40:11 +0800[diff] [blame]49CONFIG_SPI_FLASH_ATMEL=y
50CONFIG_SPI_FLASH_DATAFLASH=y
Wenyou Yang9c4fbd52017-04-18 15:18:47 +0800[diff] [blame]51CONFIG_DM_ETH=y
52CONFIG_MACB=y
53CONFIG_PINCTRL=y
54CONFIG_PINCTRL_AT91=y
55CONFIG_DM_SERIAL=y
Wenyou Yangde56d372017-04-18 15:18:49 +0800[diff] [blame]56CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang9c4fbd52017-04-18 15:18:47 +0800[diff] [blame]57CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]58CONFIG_SPI=y
Wenyou.Yang@microchip.come4ac71b2017-07-21 13:40:11 +0800[diff] [blame]59CONFIG_DM_SPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]60CONFIG_TIMER=y
61CONFIG_ATMEL_PIT_TIMER=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]62CONFIG_USB=y