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git01.mediatek.com / filogic / uboot / e1e30b242ba979879e77d872befa46875973c33f / . / configs / socfpga_stratix10_defconfig
blob: a7f39913ab11b38a4e6cf11df12c92cbfdce2200 [file] [log] [blame]
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
3CONFIG_SYS_TEXT_BASE=0x1000
4CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=2
Tom Rini56fd1e12020-11-30 12:50:32 -0500[diff] [blame]6CONFIG_SYS_MEMTEST_START=0x00000000
7CONFIG_SYS_MEMTEST_END=0x3fe00000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]8CONFIG_ENV_SIZE=0x1000
9CONFIG_ENV_OFFSET=0x200
Tom Rinie065fb12021-08-28 21:34:49 -0400[diff] [blame]10CONFIG_SYS_MALLOC_LEN=0x500000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]13CONFIG_SPL_TEXT_BASE=0xFFE00000
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]14CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]15CONFIG_IDENT_STRING="socfpga_stratix10"
Tien Fong Chee6fd0a712019-01-23 14:20:03 +0800[diff] [blame]16CONFIG_SPL_FS_FAT=y
Tom Rinifa943162020-10-29 10:48:01 -0400[diff] [blame]17# CONFIG_PSCI_RESET is not set
Tom Rini4d1e4f62020-05-14 08:30:09 -0400[diff] [blame]18CONFIG_OPTIMIZE_INLINING=y
19CONFIG_SPL_OPTIMIZE_INLINING=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]20CONFIG_SYS_LOAD_ADDR=0x02000000
Tom Rini527ded82019-09-23 11:47:37 -0400[diff] [blame]21CONFIG_BOOTDELAY=5
Tom Rini97faf612020-06-16 19:06:12 -0400[diff] [blame]22CONFIG_USE_BOOTARGS=y
23CONFIG_BOOTARGS="earlycon"
Siew Chin Lim14b8a482021-03-01 20:04:14 +0800[diff] [blame]24CONFIG_USE_BOOTCOMMAND=y
25CONFIG_BOOTCOMMAND="run fatscript; run mmcload; run linux_qspi_enable; run mmcboot"
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]26CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]27CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]28CONFIG_HUSH_PARSER=y
29CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
30CONFIG_CMD_MEMTEST=y
31# CONFIG_CMD_FLASH is not set
32CONFIG_CMD_GPIO=y
33CONFIG_CMD_I2C=y
34CONFIG_CMD_MMC=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]35CONFIG_CMD_SPI=y
36CONFIG_CMD_USB=y
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]37CONFIG_CMD_WDT=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]38CONFIG_CMD_DHCP=y
39CONFIG_CMD_MII=y
40CONFIG_CMD_PING=y
41CONFIG_CMD_CACHE=y
42CONFIG_CMD_EXT4=y
43CONFIG_CMD_FAT=y
44CONFIG_CMD_FS_GENERIC=y
45CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]46CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]47CONFIG_NET_RANDOM_ETHADDR=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]48CONFIG_SPL_DM_SEQ_ALIAS=y
Ley Foon Tan3fdf4362019-05-06 09:56:01 +0800[diff] [blame]49CONFIG_SPL_ALTERA_SDRAM=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]50CONFIG_DWAPB_GPIO=y
51CONFIG_DM_I2C=y
52CONFIG_SYS_I2C_DW=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]53CONFIG_MMC_DW=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]54CONFIG_MTD=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]55CONFIG_SF_DEFAULT_MODE=0x2003
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]56CONFIG_SPI_FLASH_SPANSION=y
57CONFIG_SPI_FLASH_STMICRO=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]58CONFIG_PHY_MICREL=y
59CONFIG_PHY_MICREL_KSZ90X1=y
60CONFIG_DM_ETH=y
61CONFIG_ETH_DESIGNWARE=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]62CONFIG_MII=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]63CONFIG_DM_RESET=y
64CONFIG_SPI=y
65CONFIG_CADENCE_QSPI=y
66CONFIG_DESIGNWARE_SPI=y
67CONFIG_USB=y
Ley Foon Tan9c407b52018-05-24 00:17:32 +0800[diff] [blame]68CONFIG_USB_DWC2=y
69CONFIG_USB_STORAGE=y
Marek Vasut40919d92019-06-27 00:26:34 +0200[diff] [blame]70CONFIG_DESIGNWARE_WATCHDOG=y
Marek Vasut8655f672019-06-27 01:19:23 +0200[diff] [blame]71CONFIG_WDT=y
72# CONFIG_SPL_USE_TINY_PRINTF is not set
Chin Liang Seea0437392020-08-05 18:34:33 +0800[diff] [blame]73CONFIG_PANIC_HANG=y