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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stelian Pop048bcfb2008-03-26 19:52:30 +01002/*
Stelian Popd57846e2008-05-08 22:52:10 +02003 * [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h]
4 *
5 * Copyright (C) 2007 Andrew Victor
6 * Copyright (C) 2007 Atmel Corporation.
Stelian Pop048bcfb2008-03-26 19:52:30 +01007 *
8 * Reset Controller (RSTC) - System peripherals regsters.
9 * Based on AT91SAM9261 datasheet revision D.
Stelian Pop048bcfb2008-03-26 19:52:30 +010010 */
11
12#ifndef AT91_RSTC_H
13#define AT91_RSTC_H
14
Heiko Schocher62f53f92015-01-21 08:42:53 +010015/* Reset Controller Status Register */
16#define AT91_ASM_RSTC_SR (ATMEL_BASE_RSTC + 0x04)
Eric Benard8e518ec2011-06-06 22:48:26 +000017#define AT91_ASM_RSTC_MR (ATMEL_BASE_RSTC + 0x08)
Jens Scharsig698ad062010-02-03 22:46:01 +010018
19#ifndef __ASSEMBLY__
20
21typedef struct at91_rstc {
22 u32 cr; /* Reset Controller Control Register */
23 u32 sr; /* Reset Controller Status Register */
24 u32 mr; /* Reset Controller Mode Register */
25} at91_rstc_t;
26
27#endif /* __ASSEMBLY__ */
28
29#define AT91_RSTC_KEY 0xA5000000
30
31#define AT91_RSTC_CR_PROCRST 0x00000001
32#define AT91_RSTC_CR_PERRST 0x00000004
33#define AT91_RSTC_CR_EXTRST 0x00000008
34
35#define AT91_RSTC_MR_URSTEN 0x00000001
36#define AT91_RSTC_MR_URSTIEN 0x00000010
37#define AT91_RSTC_MR_ERSTL(x) ((x & 0xf) << 8)
38#define AT91_RSTC_MR_ERSTL_MASK 0x0000FF00
39
40#define AT91_RSTC_SR_NRSTL 0x00010000
41
Roger Meier044a5e82013-11-04 07:40:44 +010042#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */
43#define AT91_RSTC_RSTTYP_GENERAL (0 << 8)
44#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8)
45#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8)
46#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8)
47#define AT91_RSTC_RSTTYP_USER (4 << 8)
48
Stelian Pop048bcfb2008-03-26 19:52:30 +010049#endif