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git01.mediatek.com / filogic / uboot / e17596d0db84c272690fc72b3667ffe142544cbb / . / arch / arm / dts / imx8qxp-capricorn-u-boot.dtsi
blob: cba56188f86d4dd4d449f94a018f5edf4757b22c [file] [log] [blame]
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 Siemens AG
4 */
5
Oliver Grauteeeddb282022-11-04 16:03:41 +0100[diff] [blame]6#include "imx8qxp-u-boot.dtsi"
7
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]8&{/imx8qx-pm} {
9
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]10 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]11};
12
13&mu {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]14 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]15};
16
17&clk {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]18 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]19};
20
21&iomuxc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]22 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]23};
24
25&pd_lsio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]26 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]27};
28
29&pd_lsio_gpio0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]30 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]31};
32
33&pd_lsio_gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]34 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]35};
36
37&pd_lsio_gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]38 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]39};
40
41&pd_lsio_gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]42 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]43};
44
45&pd_lsio_gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]46 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]47};
48
49&pd_lsio_gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]50 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]51};
52
53&pd_lsio_gpio6 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]54 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]55};
56
57&pd_lsio_gpio7 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]59};
60
61&pd_dma {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]62 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]63};
64
65&pd_dma_lpuart0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]66 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]67};
68
69&pd_dma_lpuart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]70 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]71};
72
73&pd_conn {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]74 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]75};
76
77&pd_conn_sdch0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]78 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]79};
80
81&pd_conn_sdch1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]82 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]83};
84
85&pd_conn_sdch2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]86 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]87};
88
89&gpio0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]90 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]91};
92
93&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]94 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]95};
96
97&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]98 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]99};
100
101&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]102 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]103};
104
105&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]106 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]107};
108
109&gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]110 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]111};
112
113&gpio6 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]114 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]115};
116
117&gpio7 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]118 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]119};
120
121&lpuart0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]122 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]123};
124
125&lpuart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]126 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]127};
128
129&usdhc1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]130 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]131};
132
133&usdhc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]134 bootph-pre-ram;
Anatolij Gustschin49234a32020-01-07 16:37:42 +0100[diff] [blame]135};