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git01.mediatek.com / filogic / uboot / e17596d0db84c272690fc72b3667ffe142544cbb / . / arch / arm / dts / imx28-xea.dts
blob: a400c108f66a2d33f7e9ca3cf74421ad506ac75c [file] [log] [blame]
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]2/*
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]3 * Copyright 2021
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]5 */
6
7/dts-v1/;
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]8#include "imx28-lwe.dtsi"
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]9
10/ {
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]11 compatible = "lwn,imx28-xea", "fsl,imx28";
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]12};
13
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]14&can0 {
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]15 pinctrl-names = "default";
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]16 pinctrl-0 = <&can1_pins_a>;
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]17 status = "okay";
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]18};
19
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]20&i2c1 {
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]21 pinctrl-names = "default";
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]22 pinctrl-0 = <&i2c1_pins_b>;
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]23 status = "okay";
24};
25
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]26&pinctrl {
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]27 pinctrl-names = "default";
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]28 pinctrl-0 = <&hog_pins_a &hog_pins_tiva>;
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]29
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]30 hog_pins_a: hog@0 {
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]31 reg = <0>;
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]32 fsl,pinmux-ids = <
33 MX28_PAD_GPMI_D00__GPIO_0_0
34 MX28_PAD_GPMI_D02__GPIO_0_2
35 MX28_PAD_GPMI_D05__GPIO_0_5
36 MX28_PAD_GPMI_CE1N__GPIO_0_17
37 MX28_PAD_GPMI_RDY0__GPIO_0_20
38 MX28_PAD_GPMI_RDY1__GPIO_0_21
39 MX28_PAD_GPMI_RDY2__GPIO_0_22
40 MX28_PAD_GPMI_RDN__GPIO_0_24
41 MX28_PAD_GPMI_CLE__GPIO_0_27
42 MX28_PAD_LCD_VSYNC__GPIO_1_28
43 MX28_PAD_SSP1_SCK__GPIO_2_12
44 MX28_PAD_SSP1_CMD__GPIO_2_13
45 MX28_PAD_SSP2_SS1__GPIO_2_20
46 MX28_PAD_SSP2_SS2__GPIO_2_21
47 MX28_PAD_LCD_D00__GPIO_1_0
48 MX28_PAD_LCD_D01__GPIO_1_1
49 MX28_PAD_LCD_D02__GPIO_1_2
50 MX28_PAD_LCD_D03__GPIO_1_3
51 MX28_PAD_LCD_D04__GPIO_1_4
52 MX28_PAD_LCD_D05__GPIO_1_5
53 MX28_PAD_LCD_D06__GPIO_1_6
54 >;
55 fsl,drive-strength = <MXS_DRIVE_4mA>;
56 fsl,voltage = <MXS_VOLTAGE_HIGH>;
57 fsl,pull-up = <MXS_PULL_DISABLE>;
58 };
59
60 hog_pins_tiva: hog@1 {
61 reg = <1>;
62 fsl,pinmux-ids = <
63 MX28_PAD_GPMI_RDY3__GPIO_0_23
64 MX28_PAD_GPMI_WRN__GPIO_0_25
65 >;
66 fsl,voltage = <MXS_VOLTAGE_HIGH>;
67 fsl,pull-up = <MXS_PULL_DISABLE>;
68 };
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]69
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]70 hog_pins_coding: hog@2 {
71 reg = <2>;
72 fsl,pinmux-ids = <
73 MX28_PAD_GPMI_D01__GPIO_0_1
74 MX28_PAD_GPMI_D03__GPIO_0_3
75 MX28_PAD_GPMI_D04__GPIO_0_4
76 MX28_PAD_GPMI_D06__GPIO_0_6
77 MX28_PAD_GPMI_D07__GPIO_0_7
78 >;
79 fsl,voltage = <MXS_VOLTAGE_HIGH>;
80 fsl,pull-up = <MXS_PULL_DISABLE>;
Lukasz Majewskif3adb662019-12-08 22:06:56 +0100[diff] [blame]81 };
82};
Lukasz Majewski6f5b86a2021-12-27 11:46:41 +0100[diff] [blame]83
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]84&reg_fec_3v3 {
85 gpio = <&gpio0 0 0>;
Lukasz Majewski6f5b86a2021-12-27 11:46:41 +0100[diff] [blame]86};
87
Marcel Ziswilerbebd24e2022-10-22 23:59:42 +0200[diff] [blame]88&reg_usb_5v {
89 gpio = <&gpio0 2 0>;
90};
91
92&spi2_pins_a {
93 fsl,pinmux-ids = <
94 MX28_PAD_SSP2_SCK__SSP2_SCK
95 MX28_PAD_SSP2_MOSI__SSP2_CMD
96 MX28_PAD_SSP2_MISO__SSP2_D0
97 MX28_PAD_SSP2_SS0__GPIO_2_19
98 >;
Lukasz Majewski6f5b86a2021-12-27 11:46:41 +0100[diff] [blame]99};