Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | |||||
3 | #include <config.h> | ||||
4 | |||||
5 | / { | ||||
6 | aliases { | ||||
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 7 | i2c0 = &i2c0; |
8 | i2c1 = &i2c3; | ||||
9 | i2c2 = &i2c4; | ||||
Michael Walle | 2a20ed1 | 2021-10-13 18:14:15 +0200 | [diff] [blame] | 10 | ethernet2 = &enetc_port2; |
11 | ethernet3 = &enetc_port3; | ||||
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 12 | }; |
13 | |||||
Michael Walle | f5253fb | 2020-11-18 17:46:01 +0100 | [diff] [blame] | 14 | binman: binman { |
Michael Walle | 927f0c4 | 2021-09-29 13:39:10 +0200 | [diff] [blame] | 15 | multiple-images; |
16 | }; | ||||
17 | }; | ||||
18 | |||||
19 | &binman { | ||||
20 | u_boot_rom: u-boot-rom { | ||||
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 21 | filename = "u-boot.rom"; |
22 | pad-byte = <0xff>; | ||||
23 | |||||
24 | u-boot-spl { | ||||
25 | }; | ||||
26 | |||||
27 | fit { | ||||
28 | offset = <CONFIG_SPL_PAD_TO>; | ||||
29 | description = "FIT image with multiple configurations"; | ||||
Michael Walle | fb55906 | 2022-02-25 18:21:56 +0530 | [diff] [blame] | 30 | fit,fdt-list = "of-list"; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 31 | |
32 | images { | ||||
33 | uboot { | ||||
34 | description = "U-Boot"; | ||||
35 | type = "firmware"; | ||||
36 | os = "u-boot"; | ||||
37 | arch = "arm"; | ||||
38 | compression = "none"; | ||||
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 39 | load = <CONFIG_TEXT_BASE>; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 40 | |
41 | u-boot-nodtb { | ||||
42 | }; | ||||
43 | }; | ||||
44 | |||||
Michael Walle | fb55906 | 2022-02-25 18:21:56 +0530 | [diff] [blame] | 45 | @fdt-SEQ { |
46 | description = "NAME"; | ||||
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 47 | type = "flat_dt"; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 48 | compression = "none"; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 49 | }; |
50 | }; | ||||
51 | |||||
52 | configurations { | ||||
Michael Walle | fb55906 | 2022-02-25 18:21:56 +0530 | [diff] [blame] | 53 | default = "@config-DEFAULT-SEQ"; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 54 | |
Michael Walle | fb55906 | 2022-02-25 18:21:56 +0530 | [diff] [blame] | 55 | @config-SEQ { |
56 | description = "NAME"; | ||||
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 57 | firmware = "uboot"; |
Michael Walle | fb55906 | 2022-02-25 18:21:56 +0530 | [diff] [blame] | 58 | fdt = "fdt-SEQ"; |
Michael Walle | ba3aa6b | 2021-01-08 00:08:58 +0100 | [diff] [blame] | 59 | }; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 60 | }; |
61 | }; | ||||
62 | }; | ||||
63 | }; | ||||
64 | |||||
Michael Walle | 927f0c4 | 2021-09-29 13:39:10 +0200 | [diff] [blame] | 65 | &binman { |
66 | u-boot-update { | ||||
67 | filename = "u-boot.update"; | ||||
68 | |||||
69 | fit { | ||||
70 | description = "FIT update image"; | ||||
71 | |||||
72 | images { | ||||
73 | u-boot-bin { | ||||
74 | description = "U-Boot"; | ||||
75 | type = "firmware"; | ||||
76 | os = "u-boot"; | ||||
77 | arch = "arm"; | ||||
78 | compression = "none"; | ||||
79 | load = <0>; /* unused */ | ||||
80 | |||||
81 | blob { | ||||
82 | filename = "u-boot.rom"; | ||||
83 | }; | ||||
84 | }; | ||||
85 | }; | ||||
86 | }; | ||||
87 | }; | ||||
88 | }; | ||||
89 | |||||
Michael Walle | 898a8be | 2021-03-26 19:40:59 +0100 | [diff] [blame] | 90 | #ifdef CONFIG_SL28_ENABLE_SER0_CONSOLE |
91 | / { | ||||
92 | chosen { | ||||
93 | stdout-path = "serial2:115200n8"; | ||||
94 | }; | ||||
95 | }; | ||||
96 | #endif | ||||
97 | |||||
Michael Walle | f5253fb | 2020-11-18 17:46:01 +0100 | [diff] [blame] | 98 | #ifdef CONFIG_SL28_SPL_LOADS_ATF_BL31 |
Michael Walle | 927f0c4 | 2021-09-29 13:39:10 +0200 | [diff] [blame] | 99 | &u_boot_rom { |
Michael Walle | f5253fb | 2020-11-18 17:46:01 +0100 | [diff] [blame] | 100 | fit { |
101 | images { | ||||
102 | bl31 { | ||||
103 | description = "ARM Trusted Firmware (bl31)"; | ||||
104 | type = "firmware"; | ||||
105 | arch = "arm"; | ||||
106 | os = "arm-trusted-firmware"; | ||||
107 | compression = "none"; | ||||
108 | load = <CONFIG_SL28_BL31_ENTRY_ADDR>; | ||||
109 | entry = <CONFIG_SL28_BL31_ENTRY_ADDR>; | ||||
110 | |||||
111 | blob-ext { | ||||
112 | filename = "bl31.bin"; | ||||
113 | }; | ||||
114 | }; | ||||
115 | }; | ||||
116 | |||||
117 | configurations { | ||||
Michael Walle | fb55906 | 2022-02-25 18:21:56 +0530 | [diff] [blame] | 118 | @config-SEQ { |
Michael Walle | ba3aa6b | 2021-01-08 00:08:58 +0100 | [diff] [blame] | 119 | firmware = "bl31"; |
120 | loadables = "uboot"; | ||||
121 | }; | ||||
Michael Walle | f5253fb | 2020-11-18 17:46:01 +0100 | [diff] [blame] | 122 | }; |
123 | }; | ||||
124 | }; | ||||
125 | #endif | ||||
126 | |||||
Michael Walle | 76427fb | 2020-11-18 17:46:02 +0100 | [diff] [blame] | 127 | #ifdef CONFIG_SL28_SPL_LOADS_OPTEE_BL32 |
Michael Walle | 927f0c4 | 2021-09-29 13:39:10 +0200 | [diff] [blame] | 128 | &u_boot_rom { |
Michael Walle | 76427fb | 2020-11-18 17:46:02 +0100 | [diff] [blame] | 129 | fit { |
130 | images { | ||||
131 | bl32 { | ||||
132 | description = "OP-TEE Trusted OS (bl32)"; | ||||
133 | type = "firmware"; | ||||
134 | arch = "arm"; | ||||
135 | os = "tee"; | ||||
136 | compression = "none"; | ||||
137 | load = <CONFIG_SL28_BL32_ENTRY_ADDR>; | ||||
138 | entry = <CONFIG_SL28_BL32_ENTRY_ADDR>; | ||||
139 | |||||
140 | blob-ext { | ||||
141 | filename = "tee.bin"; | ||||
142 | }; | ||||
143 | }; | ||||
144 | }; | ||||
145 | |||||
146 | configurations { | ||||
Michael Walle | fb55906 | 2022-02-25 18:21:56 +0530 | [diff] [blame] | 147 | @config-SEQ { |
Michael Walle | ba3aa6b | 2021-01-08 00:08:58 +0100 | [diff] [blame] | 148 | loadables = "uboot", "bl32"; |
149 | }; | ||||
Michael Walle | 76427fb | 2020-11-18 17:46:02 +0100 | [diff] [blame] | 150 | }; |
151 | }; | ||||
152 | }; | ||||
153 | #endif | ||||
154 | |||||
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 155 | &fspi { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 156 | bootph-all; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 157 | flash@0 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 158 | bootph-all; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 159 | }; |
160 | }; | ||||
161 | |||||
162 | &dspi2 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 163 | bootph-all; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 164 | }; |
165 | |||||
Michael Walle | 2a20ed1 | 2021-10-13 18:14:15 +0200 | [diff] [blame] | 166 | &esdhc { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 167 | bootph-all; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 168 | }; |
169 | |||||
170 | &esdhc1 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 171 | bootph-all; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 172 | }; |
173 | |||||
Michael Walle | 898a8be | 2021-03-26 19:40:59 +0100 | [diff] [blame] | 174 | &lpuart1 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 175 | bootph-all; |
Michael Walle | 898a8be | 2021-03-26 19:40:59 +0100 | [diff] [blame] | 176 | }; |
177 | |||||
Michael Walle | 2a20ed1 | 2021-10-13 18:14:15 +0200 | [diff] [blame] | 178 | &duart0 { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 179 | bootph-all; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 180 | }; |
181 | |||||
Michael Walle | 0a908fb | 2021-10-13 18:14:25 +0200 | [diff] [blame] | 182 | /* |
183 | * u-boot will enable the device in the linux device tree in place. Because | ||||
184 | * we are using the linux device tree, we have to enable the PCI controller | ||||
185 | * ourselves. | ||||
186 | */ | ||||
187 | &pcie1 { | ||||
188 | status = "okay"; | ||||
189 | }; | ||||
190 | |||||
191 | &pcie2 { | ||||
192 | status = "okay"; | ||||
193 | }; | ||||
194 | |||||
Michael Walle | 773a7f8 | 2021-10-13 18:14:27 +0200 | [diff] [blame] | 195 | &sata { |
196 | status = "okay"; | ||||
197 | }; | ||||
198 | |||||
Michael Walle | a81b2e8 | 2021-10-13 18:14:03 +0200 | [diff] [blame] | 199 | &soc { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 200 | bootph-all; |
Michael Walle | a81b2e8 | 2021-10-13 18:14:03 +0200 | [diff] [blame] | 201 | }; |
202 | |||||
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 203 | &sysclk { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 204 | bootph-all; |
Michael Walle | 36ba764 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 205 | }; |