Simon Glass | 0ca7009 | 2021-12-16 20:59:13 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | |
| 3 | /* This include file covers the common peripherals and configuration between |
| 4 | * bcm2835, bcm2836 and bcm2837 implementations. |
| 5 | */ |
| 6 | |
| 7 | / { |
| 8 | interrupt-parent = <&intc>; |
| 9 | |
| 10 | soc { |
| 11 | dma: dma@7e007000 { |
| 12 | compatible = "brcm,bcm2835-dma"; |
| 13 | reg = <0x7e007000 0xf00>; |
| 14 | interrupts = <1 16>, |
| 15 | <1 17>, |
| 16 | <1 18>, |
| 17 | <1 19>, |
| 18 | <1 20>, |
| 19 | <1 21>, |
| 20 | <1 22>, |
| 21 | <1 23>, |
| 22 | <1 24>, |
| 23 | <1 25>, |
| 24 | <1 26>, |
| 25 | /* dma channel 11-14 share one irq */ |
| 26 | <1 27>, |
| 27 | <1 27>, |
| 28 | <1 27>, |
| 29 | <1 27>, |
| 30 | /* unused shared irq for all channels */ |
| 31 | <1 28>; |
| 32 | interrupt-names = "dma0", |
| 33 | "dma1", |
| 34 | "dma2", |
| 35 | "dma3", |
| 36 | "dma4", |
| 37 | "dma5", |
| 38 | "dma6", |
| 39 | "dma7", |
| 40 | "dma8", |
| 41 | "dma9", |
| 42 | "dma10", |
| 43 | "dma11", |
| 44 | "dma12", |
| 45 | "dma13", |
| 46 | "dma14", |
| 47 | "dma-shared-all"; |
| 48 | #dma-cells = <1>; |
| 49 | brcm,dma-channel-mask = <0x7f35>; |
| 50 | }; |
| 51 | |
| 52 | intc: interrupt-controller@7e00b200 { |
| 53 | compatible = "brcm,bcm2835-armctrl-ic"; |
| 54 | reg = <0x7e00b200 0x200>; |
| 55 | interrupt-controller; |
| 56 | #interrupt-cells = <2>; |
| 57 | }; |
| 58 | |
| 59 | pm: watchdog@7e100000 { |
| 60 | compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; |
| 61 | #power-domain-cells = <1>; |
| 62 | #reset-cells = <1>; |
| 63 | reg = <0x7e100000 0x114>, |
| 64 | <0x7e00a000 0x24>; |
| 65 | clocks = <&clocks BCM2835_CLOCK_V3D>, |
| 66 | <&clocks BCM2835_CLOCK_PERI_IMAGE>, |
| 67 | <&clocks BCM2835_CLOCK_H264>, |
| 68 | <&clocks BCM2835_CLOCK_ISP>; |
| 69 | clock-names = "v3d", "peri_image", "h264", "isp"; |
| 70 | system-power-controller; |
| 71 | }; |
| 72 | |
| 73 | rng@7e104000 { |
| 74 | compatible = "brcm,bcm2835-rng"; |
| 75 | reg = <0x7e104000 0x10>; |
| 76 | interrupts = <2 29>; |
| 77 | }; |
| 78 | |
| 79 | pixelvalve@7e206000 { |
| 80 | compatible = "brcm,bcm2835-pixelvalve0"; |
| 81 | reg = <0x7e206000 0x100>; |
| 82 | interrupts = <2 13>; /* pwa0 */ |
| 83 | }; |
| 84 | |
| 85 | pixelvalve@7e207000 { |
| 86 | compatible = "brcm,bcm2835-pixelvalve1"; |
| 87 | reg = <0x7e207000 0x100>; |
| 88 | interrupts = <2 14>; /* pwa1 */ |
| 89 | }; |
| 90 | |
| 91 | thermal: thermal@7e212000 { |
| 92 | compatible = "brcm,bcm2835-thermal"; |
| 93 | reg = <0x7e212000 0x8>; |
| 94 | clocks = <&clocks BCM2835_CLOCK_TSENS>; |
| 95 | #thermal-sensor-cells = <0>; |
| 96 | status = "disabled"; |
| 97 | }; |
| 98 | |
| 99 | i2c2: i2c@7e805000 { |
| 100 | compatible = "brcm,bcm2835-i2c"; |
| 101 | reg = <0x7e805000 0x1000>; |
| 102 | interrupts = <2 21>; |
| 103 | clocks = <&clocks BCM2835_CLOCK_VPU>; |
| 104 | #address-cells = <1>; |
| 105 | #size-cells = <0>; |
| 106 | status = "okay"; |
| 107 | }; |
| 108 | |
| 109 | vec: vec@7e806000 { |
| 110 | compatible = "brcm,bcm2835-vec"; |
| 111 | reg = <0x7e806000 0x1000>; |
| 112 | clocks = <&clocks BCM2835_CLOCK_VEC>; |
| 113 | interrupts = <2 27>; |
| 114 | status = "disabled"; |
| 115 | }; |
| 116 | |
| 117 | pixelvalve@7e807000 { |
| 118 | compatible = "brcm,bcm2835-pixelvalve2"; |
| 119 | reg = <0x7e807000 0x100>; |
| 120 | interrupts = <2 10>; /* pixelvalve */ |
| 121 | }; |
| 122 | |
| 123 | hdmi: hdmi@7e902000 { |
| 124 | compatible = "brcm,bcm2835-hdmi"; |
| 125 | reg = <0x7e902000 0x600>, |
| 126 | <0x7e808000 0x100>; |
| 127 | interrupts = <2 8>, <2 9>; |
| 128 | ddc = <&i2c2>; |
| 129 | clocks = <&clocks BCM2835_PLLH_PIX>, |
| 130 | <&clocks BCM2835_CLOCK_HSM>; |
| 131 | clock-names = "pixel", "hdmi"; |
| 132 | dmas = <&dma 17>; |
| 133 | dma-names = "audio-rx"; |
| 134 | status = "disabled"; |
| 135 | }; |
| 136 | |
| 137 | v3d: v3d@7ec00000 { |
| 138 | compatible = "brcm,bcm2835-v3d"; |
| 139 | reg = <0x7ec00000 0x1000>; |
| 140 | interrupts = <1 10>; |
| 141 | }; |
| 142 | |
| 143 | vc4: gpu { |
| 144 | compatible = "brcm,bcm2835-vc4"; |
| 145 | }; |
| 146 | }; |
| 147 | }; |
| 148 | |
| 149 | &cpu_thermal { |
| 150 | thermal-sensors = <&thermal>; |
| 151 | }; |
| 152 | |
| 153 | &gpio { |
| 154 | i2c_slave_gpio18: i2c_slave_gpio18 { |
| 155 | brcm,pins = <18 19 20 21>; |
| 156 | brcm,function = <BCM2835_FSEL_ALT3>; |
| 157 | }; |
| 158 | |
| 159 | jtag_gpio4: jtag_gpio4 { |
| 160 | brcm,pins = <4 5 6 12 13>; |
| 161 | brcm,function = <BCM2835_FSEL_ALT5>; |
| 162 | }; |
| 163 | |
| 164 | pwm0_gpio12: pwm0_gpio12 { |
| 165 | brcm,pins = <12>; |
| 166 | brcm,function = <BCM2835_FSEL_ALT0>; |
| 167 | }; |
| 168 | pwm0_gpio18: pwm0_gpio18 { |
| 169 | brcm,pins = <18>; |
| 170 | brcm,function = <BCM2835_FSEL_ALT5>; |
| 171 | }; |
| 172 | pwm0_gpio40: pwm0_gpio40 { |
| 173 | brcm,pins = <40>; |
| 174 | brcm,function = <BCM2835_FSEL_ALT0>; |
| 175 | }; |
| 176 | pwm1_gpio13: pwm1_gpio13 { |
| 177 | brcm,pins = <13>; |
| 178 | brcm,function = <BCM2835_FSEL_ALT0>; |
| 179 | }; |
| 180 | pwm1_gpio19: pwm1_gpio19 { |
| 181 | brcm,pins = <19>; |
| 182 | brcm,function = <BCM2835_FSEL_ALT5>; |
| 183 | }; |
| 184 | pwm1_gpio41: pwm1_gpio41 { |
| 185 | brcm,pins = <41>; |
| 186 | brcm,function = <BCM2835_FSEL_ALT0>; |
| 187 | }; |
| 188 | pwm1_gpio45: pwm1_gpio45 { |
| 189 | brcm,pins = <45>; |
| 190 | brcm,function = <BCM2835_FSEL_ALT0>; |
| 191 | }; |
| 192 | }; |
| 193 | |
| 194 | &i2s { |
| 195 | dmas = <&dma 2>, <&dma 3>; |
| 196 | dma-names = "tx", "rx"; |
| 197 | }; |
| 198 | |
| 199 | &sdhost { |
| 200 | dmas = <&dma 13>; |
| 201 | dma-names = "rx-tx"; |
| 202 | }; |
| 203 | |
| 204 | &spi { |
| 205 | dmas = <&dma 6>, <&dma 7>; |
| 206 | dma-names = "tx", "rx"; |
| 207 | }; |