blob: 93dd3c58a864d5338d4e95ebcf39035094081f84 [file] [log] [blame]
John Rigby6478a752010-01-25 23:12:58 -07001/*
2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
John Rigby6478a752010-01-25 23:12:58 -07006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000011#include <asm/arch/imx-regs.h>
John Rigby6478a752010-01-25 23:12:58 -070012
13/*
14 * KARO TX25 board - SoC Configuration
15 */
John Rigby6478a752010-01-25 23:12:58 -070016#define CONFIG_MX25
John Rigby6478a752010-01-25 23:12:58 -070017#define CONFIG_MX25_CLK32 32000 /* OSC32K frequency */
18#define CONFIG_SYS_HZ 1000
19
20#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
21
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000022#define CONFIG_SPL
23#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
24#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
25#define CONFIG_SPL_MAX_SIZE 2048
26#define CONFIG_SPL_NAND_SUPPORT
Andreas Bießmann5e9cf222013-04-18 22:48:49 +000027#define CONFIG_SPL_LIBGENERIC_SUPPORT
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000028
29#define CONFIG_SPL_TEXT_BASE 0x810c0000
30#define CONFIG_SYS_TEXT_BASE 0x81200000
John Rigby6478a752010-01-25 23:12:58 -070031
Stefano Babiceedb6b72011-10-28 10:23:02 +020032#ifndef MACH_TYPE_TX25
33#define MACH_TYPE_TX25 2177
34#endif
35
36#define CONFIG_MACH_TYPE MACH_TYPE_TX25
37
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000038#ifdef CONFIG_SPL_BUILD
John Rigby6478a752010-01-25 23:12:58 -070039/* Start copying real U-boot from the second page */
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000040#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
John Rigby6478a752010-01-25 23:12:58 -070041#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x30000
Heiko Schocher0e2412a2010-09-17 13:10:42 +020042
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000043#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
Heiko Schocher0e2412a2010-09-17 13:10:42 +020044#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
John Rigby6478a752010-01-25 23:12:58 -070045
46#define CONFIG_SYS_NAND_PAGE_SIZE 2048
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +000047#define CONFIG_SYS_NAND_OOBSIZE 64
John Rigby6478a752010-01-25 23:12:58 -070048#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
49#define CONFIG_SYS_NAND_PAGE_COUNT 64
50#define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
51#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
52#else
53#define CONFIG_SKIP_LOWLEVEL_INIT
John Rigby6478a752010-01-25 23:12:58 -070054#endif
55
56#define CONFIG_DISPLAY_CPUINFO
57
Fabio Estevam7682c762011-08-30 05:44:15 +000058#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
59#define CONFIG_SETUP_MEMORY_TAGS
60#define CONFIG_INITRD_TAG
John Rigby6478a752010-01-25 23:12:58 -070061
62/*
63 * Memory Info
64 */
65/* malloc() len */
66#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
John Rigby6478a752010-01-25 23:12:58 -070067/*
68 * Board has 2 32MB banks of DRAM but there is a bug when using
69 * both so only the first is configured
70 */
71#define CONFIG_NR_DRAM_BANKS 1
72
73#define PHYS_SDRAM_1 0x80000000
74#define PHYS_SDRAM_1_SIZE 0x02000000
75#if (CONFIG_NR_DRAM_BANKS == 2)
76#define PHYS_SDRAM_2 0x90000000
77#define PHYS_SDRAM_2_SIZE 0x02000000
78#endif
79/* 8MB DRAM test */
80#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
81#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
John Rigby6478a752010-01-25 23:12:58 -070082
83/*
84 * Serial Info
85 */
Fabio Estevam7682c762011-08-30 05:44:15 +000086#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010087#define CONFIG_MXC_UART_BASE UART1_BASE
John Rigby6478a752010-01-25 23:12:58 -070088#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
89#define CONFIG_BAUDRATE 115200 /* Default baud rate */
John Rigby6478a752010-01-25 23:12:58 -070090
Fabio Estevam0fcce182011-08-29 04:27:06 +000091#define CONFIG_MXC_GPIO
92
John Rigby6478a752010-01-25 23:12:58 -070093/*
94 * Flash & Environment
95 */
96/* No NOR flash present */
Fabio Estevam7682c762011-08-30 05:44:15 +000097#define CONFIG_SYS_NO_FLASH
John Rigby6478a752010-01-25 23:12:58 -070098#define CONFIG_ENV_IS_IN_NAND
99#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
100#define CONFIG_ENV_SIZE (128 * 1024) /* 128 kB NAND block size */
101#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
102
103/* NAND */
104#define CONFIG_NAND_MXC
John Rigby6478a752010-01-25 23:12:58 -0700105#define CONFIG_MXC_NAND_REGS_BASE (0xBB000000)
106#define CONFIG_SYS_MAX_NAND_DEVICE 1
107#define CONFIG_SYS_NAND_BASE (0xBB000000)
108#define CONFIG_JFFS2_NAND
109#define CONFIG_MXC_NAND_HWECC
110#define CONFIG_SYS_NAND_LARGEPAGE
111
John Rigby6478a752010-01-25 23:12:58 -0700112/* U-Boot general configuration */
113#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
114#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
115/* Print buffer sz */
116#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
117 sizeof(CONFIG_SYS_PROMPT) + 16)
118#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
119/* Boot Argument Buffer Size */
120#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
121#define CONFIG_CMDLINE_EDITING
122#define CONFIG_SYS_LONGHELP
123
124/* U-Boot commands */
125#include <config_cmd_default.h>
126#define CONFIG_CMD_NAND
Heiko Schocher54433092010-09-17 13:10:30 +0200127#define CONFIG_CMD_CACHE
John Rigby6478a752010-01-25 23:12:58 -0700128
129/*
130 * Ethernet
131 */
132#define CONFIG_FEC_MXC
133#define CONFIG_FEC_MXC_PHYADDR 0x1f
134#define CONFIG_MII
135#define CONFIG_CMD_NET
Helmut Raigerd5a184b2011-10-20 04:19:47 +0000136#define CONFIG_BOARD_LATE_INIT
John Rigby6478a752010-01-25 23:12:58 -0700137#define CONFIG_ENV_OVERWRITE
138
139#define CONFIG_BOOTDELAY 5
140
141#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
142#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
143
John Rigby6478a752010-01-25 23:12:58 -0700144#define CONFIG_EXTRA_ENV_SETTINGS \
145 "netdev=eth0\0" \
146 "nfsargs=setenv bootargs root=/dev/nfs rw " \
147 "nfsroot=${serverip}:${rootpath}\0" \
148 "ramargs=setenv bootargs root=/dev/ram rw\0" \
149 "addip=setenv bootargs ${bootargs} " \
150 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
151 ":${hostname}:${netdev}:off panic=1\0" \
152 "addtty=setenv bootargs ${bootargs}" \
153 " console=ttymxc0,${baudrate}\0" \
154 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
155 "addmisc=setenv bootargs ${bootargs}\0" \
156 "u-boot=tx25/u-boot.bin\0" \
Marek Vasutfd5ba892012-09-23 17:41:23 +0200157 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
John Rigby6478a752010-01-25 23:12:58 -0700158 "hostname=tx25\0" \
159 "bootfile=tx25/uImage\0" \
160 "rootpath=/opt/eldk/arm\0" \
161 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
162 "run nfsargs addip addtty addmtd addmisc;" \
163 "bootm\0" \
164 "bootcmd=run net_nfs\0" \
165 "load=tftp ${loadaddr} ${u-boot}\0" \
166 "update=nand erase 0 40000;nand write ${loadaddr} 0 40000\0" \
167 "upd=run load update\0" \
168
Heiko Schocherd6d60622010-09-22 14:06:33 +0200169/* additions for new relocation code, must be added to all boards */
Heiko Schocher0e2412a2010-09-17 13:10:42 +0200170#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Benoît Thébaudeauefb7c002013-04-11 09:35:51 +0000171#define CONFIG_SYS_INIT_SP_ADDR (IMX_RAM_BASE + IMX_RAM_SIZE)
Heiko Schocher0e2412a2010-09-17 13:10:42 +0200172
John Rigby6478a752010-01-25 23:12:58 -0700173#endif /* __CONFIG_H */