Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2010 Samsung Electronics |
| 3 | * Minkyu Kang <mk7.kang@samsung.com> |
| 4 | * |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 5 | * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
| 13 | /* |
| 14 | * High Level Configuration Options |
| 15 | * (easy to change) |
| 16 | */ |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 17 | #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ |
| 18 | #define CONFIG_S5P 1 /* which is in a S5P Family */ |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 19 | #define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */ |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 20 | #define CONFIG_UNIVERSAL 1 /* working with Universal */ |
Piotr Wilczek | 461c5e5 | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 21 | #define CONFIG_TIZEN 1 /* TIZEN lib */ |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 22 | |
| 23 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 24 | |
| 25 | #define CONFIG_ARCH_CPU_INIT |
| 26 | #define CONFIG_DISPLAY_CPUINFO |
| 27 | #define CONFIG_DISPLAY_BOARDINFO |
| 28 | |
| 29 | /* Keep L2 Cache Disabled */ |
Aneesh V | ecee9c8 | 2011-06-16 23:30:48 +0000 | [diff] [blame] | 30 | #define CONFIG_SYS_L2CACHE_OFF 1 |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 31 | |
| 32 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 33 | #define CONFIG_SYS_TEXT_BASE 0x44800000 |
| 34 | |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 35 | /* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */ |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 36 | #define CONFIG_SYS_CLK_FREQ_C210 24000000 |
Chander Kashyap | 6a870e1 | 2012-02-05 23:01:45 +0000 | [diff] [blame] | 37 | #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210 |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 38 | |
| 39 | #define CONFIG_SETUP_MEMORY_TAGS |
| 40 | #define CONFIG_CMDLINE_TAG |
| 41 | #define CONFIG_INITRD_TAG |
| 42 | #define CONFIG_REVISION_TAG |
| 43 | #define CONFIG_CMDLINE_EDITING |
Piotr Wilczek | 6ce94c3 | 2012-09-20 00:20:00 +0000 | [diff] [blame] | 44 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 45 | #define CONFIG_BOARD_EARLY_INIT_F |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 46 | |
| 47 | /* Size of malloc() pool */ |
| 48 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) |
| 49 | |
| 50 | /* select serial console configuration */ |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 51 | #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ |
| 52 | #define CONFIG_BAUDRATE 115200 |
| 53 | |
| 54 | /* MMC */ |
Jaehoon Chung | a38690e | 2012-04-23 02:36:29 +0000 | [diff] [blame] | 55 | #define CONFIG_GENERIC_MMC |
| 56 | #define CONFIG_MMC |
| 57 | #define CONFIG_SDHCI |
| 58 | #define CONFIG_S5P_SDHCI |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 59 | |
Minkyu Kang | 43af47f | 2011-03-10 20:10:38 +0900 | [diff] [blame] | 60 | /* PWM */ |
| 61 | #define CONFIG_PWM 1 |
| 62 | |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 63 | /* It should define before config_cmd_default.h */ |
| 64 | #define CONFIG_SYS_NO_FLASH 1 |
| 65 | |
| 66 | /* Command definition */ |
| 67 | #include <config_cmd_default.h> |
| 68 | |
| 69 | #undef CONFIG_CMD_FPGA |
| 70 | #undef CONFIG_CMD_MISC |
| 71 | #undef CONFIG_CMD_NET |
| 72 | #undef CONFIG_CMD_NFS |
| 73 | #undef CONFIG_CMD_XIMG |
| 74 | #define CONFIG_CMD_CACHE |
| 75 | #define CONFIG_CMD_ONENAND |
| 76 | #define CONFIG_CMD_MTDPARTS |
| 77 | #define CONFIG_CMD_MMC |
| 78 | #define CONFIG_CMD_FAT |
| 79 | |
| 80 | #define CONFIG_BOOTDELAY 1 |
| 81 | #define CONFIG_ZERO_BOOTDELAY_CHECK |
| 82 | |
| 83 | #define CONFIG_MTD_DEVICE |
| 84 | #define CONFIG_MTD_PARTITIONS |
| 85 | |
| 86 | /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ |
| 87 | #define MTDIDS_DEFAULT "onenand0=samsung-onenand" |
| 88 | |
| 89 | #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\ |
| 90 | "128k(s-boot)"\ |
| 91 | ",896k(bootloader)"\ |
| 92 | ",256k(params)"\ |
| 93 | ",2816k(config)"\ |
| 94 | ",8m(csa)"\ |
| 95 | ",7m(kernel)"\ |
| 96 | ",1m(log)"\ |
| 97 | ",12m(modem)"\ |
| 98 | ",60m(qboot)"\ |
| 99 | ",-(UBI)\0" |
| 100 | |
| 101 | #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT |
| 102 | |
| 103 | #define MBRPARTS_DEFAULT "20M(permanent)"\ |
| 104 | ",20M(boot)"\ |
| 105 | ",1G(system)"\ |
| 106 | ",100M(swap)"\ |
| 107 | ",-(UMS)\0" |
| 108 | |
| 109 | #define CONFIG_BOOTARGS "Please use defined boot" |
| 110 | #define CONFIG_BOOTCOMMAND "run mmcboot" |
| 111 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" |
| 112 | |
| 113 | #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7" |
| 114 | #define CONFIG_BOOTBLOCK "10" |
| 115 | #define CONFIG_UBIBLOCK "9" |
| 116 | |
| 117 | #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc " |
| 118 | #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \ |
| 119 | "${mtdparts}" |
| 120 | |
| 121 | #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" |
| 122 | |
| 123 | #define CONFIG_ENV_OVERWRITE |
| 124 | #define CONFIG_SYS_CONSOLE_INFO_QUIET |
| 125 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
| 126 | |
| 127 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 128 | "updateb=" \ |
| 129 | "onenand erase 0x0 0x100000;" \ |
| 130 | "onenand write 0x42008000 0x0 0x100000\0" \ |
| 131 | "updatek=" \ |
| 132 | "onenand erase 0xc00000 0x500000;" \ |
| 133 | "onenand write 0x41008000 0xc00000 0x500000\0" \ |
| 134 | "bootk=" \ |
| 135 | "run loaduimage; bootm 0x40007FC0\0" \ |
| 136 | "updatemmc=" \ |
| 137 | "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ |
| 138 | "mmc boot 0 1 1 0\0" \ |
| 139 | "updatebackup=" \ |
| 140 | "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ |
| 141 | "mmc boot 0 1 1 0\0" \ |
| 142 | "updatebootb=" \ |
| 143 | "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ |
| 144 | "lpj=lpj=3981312\0" \ |
| 145 | "ubifsboot=" \ |
| 146 | "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \ |
| 147 | CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ |
| 148 | CONFIG_ENV_COMMON_BOOT "; run bootk\0" \ |
| 149 | "tftpboot=" \ |
| 150 | "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ |
| 151 | CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ |
| 152 | CONFIG_ENV_COMMON_BOOT \ |
| 153 | "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \ |
| 154 | "nfsboot=" \ |
| 155 | "set bootargs root=/dev/nfs rw " \ |
| 156 | "nfsroot=${nfsroot},nolock,tcp " \ |
| 157 | "ip=${ipaddr}:${serverip}:${gatewayip}:" \ |
| 158 | "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ |
| 159 | "; run bootk\0" \ |
| 160 | "ramfsboot=" \ |
| 161 | "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ |
| 162 | "${console} ${meminfo} " \ |
| 163 | "initrd=0x43000000,8M ramdisk=8192\0" \ |
| 164 | "mmcboot=" \ |
| 165 | "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ |
| 166 | "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ |
| 167 | "run loaduimage; bootm 0x40007FC0\0" \ |
| 168 | "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ |
| 169 | "boottrace=setenv opts initcall_debug; run bootcmd\0" \ |
| 170 | "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ |
| 171 | "verify=n\0" \ |
| 172 | "rootfstype=ext4\0" \ |
| 173 | "console=" CONFIG_DEFAULT_CONSOLE \ |
| 174 | "mtdparts=" MTDPARTS_DEFAULT \ |
| 175 | "mbrparts=" MBRPARTS_DEFAULT \ |
| 176 | "meminfo=crashkernel=32M@0x50000000\0" \ |
| 177 | "nfsroot=/nfsroot/arm\0" \ |
| 178 | "bootblock=" CONFIG_BOOTBLOCK "\0" \ |
| 179 | "ubiblock=" CONFIG_UBIBLOCK" \0" \ |
| 180 | "ubi=enabled\0" \ |
| 181 | "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ |
| 182 | "mmcdev=0\0" \ |
| 183 | "mmcbootpart=2\0" \ |
| 184 | "mmcrootpart=3\0" \ |
| 185 | "opts=always_resume=1" |
| 186 | |
| 187 | /* Miscellaneous configurable options */ |
| 188 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 189 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 190 | #define CONFIG_SYS_PROMPT "Universal # " |
| 191 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 192 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ |
| 193 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 194 | /* Boot Argument Buffer Size */ |
| 195 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 196 | /* memtest works on */ |
| 197 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 198 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) |
| 199 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) |
| 200 | |
| 201 | #define CONFIG_SYS_HZ 1000 |
| 202 | |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 203 | /* Universal has 2 banks of DRAM */ |
| 204 | #define CONFIG_NR_DRAM_BANKS 2 |
| 205 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ |
| 206 | #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ |
| 207 | #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ |
| 208 | #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ |
| 209 | |
| 210 | #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ |
| 211 | |
| 212 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
| 213 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
| 214 | |
| 215 | #define CONFIG_USE_ONENAND_BOARD_INIT |
Lukasz Majewski | 7eada18 | 2011-11-09 11:06:14 +0100 | [diff] [blame] | 216 | #define CONFIG_SAMSUNG_ONENAND |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 217 | #define CONFIG_SYS_ONENAND_BASE 0x0C000000 |
| 218 | |
| 219 | #define CONFIG_ENV_IS_IN_MMC 1 |
| 220 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 221 | #define CONFIG_ENV_SIZE 4096 |
| 222 | #define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */ |
| 223 | |
| 224 | #define CONFIG_DOS_PARTITION 1 |
| 225 | |
| 226 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) |
| 227 | |
Łukasz Majewski | 0cdffcc | 2011-10-17 01:42:24 +0000 | [diff] [blame] | 228 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
| 229 | |
Łukasz Majewski | a3f38a8 | 2011-10-26 22:33:17 +0000 | [diff] [blame] | 230 | #include <asm/arch/gpio.h> |
| 231 | /* |
| 232 | * I2C Settings |
| 233 | */ |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 234 | #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7) |
| 235 | #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) |
Łukasz Majewski | a3f38a8 | 2011-10-26 22:33:17 +0000 | [diff] [blame] | 236 | |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 237 | #define CONFIG_SYS_I2C |
| 238 | #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ |
| 239 | #define CONFIG_SYS_I2C_SOFT_SPEED 50000 |
| 240 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0 |
Łukasz Majewski | a3f38a8 | 2011-10-26 22:33:17 +0000 | [diff] [blame] | 241 | #define CONFIG_SOFT_I2C_READ_REPEATED_START |
Łukasz Majewski | a3f38a8 | 2011-10-26 22:33:17 +0000 | [diff] [blame] | 242 | #define CONFIG_I2C_MULTI_BUS |
| 243 | #define CONFIG_SYS_MAX_I2C_BUS 7 |
| 244 | |
Łukasz Majewski | 1b6d9ed | 2012-11-13 03:22:14 +0000 | [diff] [blame] | 245 | #define CONFIG_POWER |
| 246 | #define CONFIG_POWER_I2C |
| 247 | #define CONFIG_POWER_MAX8998 |
Łukasz Majewski | a3f38a8 | 2011-10-26 22:33:17 +0000 | [diff] [blame] | 248 | |
Lukasz Majewski | bf73126 | 2011-12-15 10:32:12 +0100 | [diff] [blame] | 249 | #define CONFIG_USB_GADGET |
| 250 | #define CONFIG_USB_GADGET_S3C_UDC_OTG |
| 251 | #define CONFIG_USB_GADGET_DUALSPEED |
| 252 | |
Piotr Wilczek | e372b55 | 2012-10-19 05:34:03 +0000 | [diff] [blame] | 253 | /* |
| 254 | * SPI Settings |
| 255 | */ |
| 256 | #define CONFIG_SOFT_SPI |
| 257 | #define CONFIG_SOFT_SPI_MODE SPI_MODE_3 |
| 258 | #define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1) |
| 259 | #define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3) |
| 260 | #define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0) |
| 261 | #define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3) |
| 262 | |
| 263 | #define SPI_DELAY udelay(1) |
| 264 | #undef SPI_INIT |
| 265 | #define SPI_SCL(bit) universal_spi_scl(bit) |
| 266 | #define SPI_SDA(bit) universal_spi_sda(bit) |
| 267 | #define SPI_READ universal_spi_read() |
| 268 | #ifndef __ASSEMBLY__ |
| 269 | void universal_spi_scl(int bit); |
| 270 | void universal_spi_sda(int bit); |
| 271 | int universal_spi_read(void); |
| 272 | #endif |
| 273 | |
Piotr Wilczek | 461c5e5 | 2012-10-19 05:34:07 +0000 | [diff] [blame] | 274 | /* |
| 275 | * LCD Settings |
| 276 | */ |
| 277 | #define CONFIG_EXYNOS_FB |
| 278 | #define CONFIG_LCD |
| 279 | #define CONFIG_CMD_BMP |
| 280 | #define CONFIG_BMP_32BPP |
| 281 | #define CONFIG_LD9040 |
| 282 | #define CONFIG_EXYNOS_MIPI_DSIM |
| 283 | #define CONFIG_VIDEO_BMP_GZIP |
| 284 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12)) |
| 285 | |
Minkyu Kang | 0aa1a6b | 2011-01-24 15:33:50 +0900 | [diff] [blame] | 286 | #endif /* __CONFIG_H */ |