blob: 24ddfe0c7989478ec722e6ba2c5466f3ddcb75af [file] [log] [blame]
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +02001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +02006 */
7
8/*
9 * This file contains the configuration parameters for qemu-mips64 target.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020015#define CONFIG_QEMU_MIPS
Daniel Schwierzeckac25adf2014-11-15 23:30:01 +010016
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020017#define CONFIG_MISC_INIT_R
18
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020019#define CONFIG_TIMESTAMP /* Print image info with timestamp */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020020
21#define CONFIG_EXTRA_ENV_SETTINGS \
22 "addmisc=setenv bootargs ${bootargs} " \
23 "console=ttyS0,${baudrate} " \
24 "panic=1\0" \
25 "bootfile=/tftpboot/vmlinux\0" \
26 "load=tftp ffffffff80500000 ${u-boot}\0" \
27 ""
28
29#define CONFIG_BOOTCOMMAND "bootp;bootelf"
30
31/*
32 * BOOTP options
33 */
34#define CONFIG_BOOTP_BOOTFILESIZE
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020035
36/*
37 * Command line configuration.
38 */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020039
40#define CONFIG_DRIVER_NE2000
41#define CONFIG_DRIVER_NE2000_BASE 0xffffffffb4000300
42
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020043#define CONFIG_SYS_NS16550_SERIAL
44#define CONFIG_SYS_NS16550_REG_SIZE 1
45#define CONFIG_SYS_NS16550_CLK 115200
46#define CONFIG_SYS_NS16550_COM1 0xffffffffb40003f8
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020047
Stanislav Galabov19030fd2016-02-17 15:23:30 +020048#ifdef CONFIG_SYS_BIG_ENDIAN
49#define CONFIG_IDE_SWAP_IO
50#endif
51
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020052#define CONFIG_SYS_IDE_MAXBUS 2
53#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
54#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
55#define CONFIG_SYS_ATA_DATA_OFFSET 0
56#define CONFIG_SYS_ATA_REG_OFFSET 0
57#define CONFIG_SYS_ATA_BASE_ADDR 0xffffffffb4000000
58
59#define CONFIG_SYS_IDE_MAXDEVICE 4
60
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020061/*
62 * Miscellaneous configurable options
63 */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020064
Kyle Edwards27e5e132017-04-12 22:42:32 -040065#define CONFIG_SYS_MALLOC_LEN (256 << 10)
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020066
67#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
68
69#define CONFIG_SYS_MHZ 132
70
71#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
72
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020073/* Cached addr */
74#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
75
76/* default load address */
77#define CONFIG_SYS_LOAD_ADDR 0xffffffff81000000
78
79#define CONFIG_SYS_MEMTEST_START 0xffffffff80100000
80#define CONFIG_SYS_MEMTEST_END 0xffffffff80800000
81
82/*-----------------------------------------------------------------------
83 * FLASH and environment organization
84 */
85/* The following #defines are needed to get flash environment right */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020086#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020087
88#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
89
90/* We boot from this flash, selected with dip switch */
91#define CONFIG_SYS_FLASH_BASE 0xffffffffbfc00000
92#define CONFIG_SYS_MAX_FLASH_BANKS 1
93#define CONFIG_SYS_MAX_FLASH_SECT 128
94#define CONFIG_SYS_FLASH_CFI
95#define CONFIG_FLASH_CFI_DRIVER
96#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
97
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020098/* Address and size of Primary Environment Sector */
99#define CONFIG_ENV_SIZE 0x8000
Kyle Edwards07531c12017-04-12 22:42:31 -0400100#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +0200101
102#define CONFIG_ENV_OVERWRITE 1
103
104#define MEM_SIZE 128
105
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +0200106#endif /* __CONFIG_H */