blob: 022e44216efd4270d3a49221adcbba4ab5cd41cf [file] [log] [blame]
Masahiro Yamadae0a6fa82018-07-19 16:28:25 +09001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2016-2018 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 */
6
7#include <common.h>
8#include <fdt_support.h>
9#include <fdtdec.h>
10#include <linux/kernel.h>
11#include <linux/printk.h>
12
13#include "soc-info.h"
14
15/*
16 * The DRAM PHY requires 64 byte scratch area in each DRAM channel
17 * for its dynamic PHY training feature.
18 */
19static int uniphier_ld20_fdt_mem_rsv(void *fdt, bd_t *bd)
20{
21 unsigned long rsv_addr;
22 const unsigned long rsv_size = 64;
23 int i, ret;
24
25 if (!IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) ||
26 uniphier_get_soc_id() != UNIPHIER_LD20_ID)
27 return 0;
28
29 for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) {
30 if (!bd->bi_dram[i].size)
31 continue;
32
33 rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size;
34 rsv_addr -= rsv_size;
35
36 ret = fdt_add_mem_rsv(fdt, rsv_addr, rsv_size);
37 if (ret)
38 return -ENOSPC;
39
40 pr_notice(" Reserved memory region for DRAM PHY training: addr=%lx size=%lx\n",
41 rsv_addr, rsv_size);
42 }
43
44 return 0;
45}
46
47int ft_board_setup(void *fdt, bd_t *bd)
48{
49 int ret;
50
51 ret = uniphier_ld20_fdt_mem_rsv(fdt, bd);
52 if (ret)
53 return ret;
54
55 return 0;
56}