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Dirk Eibachfb605942017-02-22 16:07:23 +01001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef _CONFIG_CONTROLCENTERDC_H
9#define _CONFIG_CONTROLCENTERDC_H
10
11/*
12 * High Level Configuration Options (easy to change)
13 */
14#define CONFIG_CUSTOMER_BOARD_SUPPORT
15
16#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
17#define CONFIG_DISPLAY_BOARDINFO_LATE
18#define CONFIG_BOARD_LATE_INIT
19#define CONFIG_LAST_STAGE_INIT
Dirk Eibachfb605942017-02-22 16:07:23 +010020
21/*
22 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
23 * for DDR ECC byte filling in the SPL before loading the main
24 * U-Boot into it.
25 */
26#define CONFIG_SYS_TEXT_BASE 0x00800000
27
28#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
29
30#define CONFIG_LOADADDR 1000000
31
32/*
33 * Commands configuration
34 */
Dirk Eibachfb605942017-02-22 16:07:23 +010035#define CONFIG_CMD_I2C
36#define CONFIG_CMD_PCI
37#define CONFIG_CMD_SCSI
38#define CONFIG_CMD_SPI
39
40/* SPI NOR flash default params, used by sf commands */
41#define CONFIG_SF_DEFAULT_BUS 1
42#define CONFIG_SF_DEFAULT_SPEED 1000000
43#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
44
45/*
46 * SDIO/MMC Card Configuration
47 */
48#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
49
50/*
51 * SATA/SCSI/AHCI configuration
52 */
53#define CONFIG_LIBATA
54#define CONFIG_SCSI
55#define CONFIG_SCSI_AHCI
56#define CONFIG_SCSI_AHCI_PLAT
57#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
58#define CONFIG_SYS_SCSI_MAX_LUN 1
59#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
60 CONFIG_SYS_SCSI_MAX_LUN)
61
62/* Additional FS support/configuration */
63#define CONFIG_SUPPORT_VFAT
64
65/* USB/EHCI configuration */
66#define CONFIG_EHCI_IS_TDI
67
68/* Environment in SPI NOR flash */
69#define CONFIG_ENV_IS_IN_SPI_FLASH
70#define CONFIG_ENV_SPI_BUS 1
71#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
72#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
73#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
74
75#define CONFIG_PHY_MARVELL /* there is a marvell phy */
76#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
77
78/* PCIe support */
79#ifndef CONFIG_SPL_BUILD
80#define CONFIG_PCI
81#define CONFIG_PCI_MVEBU
82#define CONFIG_PCI_PNP
83#define CONFIG_PCI_SCAN_SHOW
84#endif
85
86#define CONFIG_SYS_ALT_MEMTEST
87
88/*
89 * Software (bit-bang) MII driver configuration
90 */
91#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
92#define CONFIG_BITBANGMII_MULTI
93
94/* SPL */
95/*
96 * Select the boot device here
97 *
98 * Currently supported are:
99 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
100 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
101 */
102#define SPL_BOOT_SPI_NOR_FLASH 1
103#define SPL_BOOT_SDIO_MMC_CARD 2
104#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
105
106/* Defines for SPL */
107#define CONFIG_SPL_FRAMEWORK
108#define CONFIG_SPL_SIZE (160 << 10)
109
110#if defined(CONFIG_SECURED_MODE_IMAGE)
111#define CONFIG_SPL_TEXT_BASE 0x40002614
112#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
113#else
114#define CONFIG_SPL_TEXT_BASE 0x40000030
115#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
116#endif
117
118#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
119#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
120
121#ifdef CONFIG_SPL_BUILD
122#define CONFIG_SYS_MALLOC_SIMPLE
123#endif
124
125#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
126#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
127
128#define CONFIG_SPL_LIBCOMMON_SUPPORT
129#define CONFIG_SPL_LIBGENERIC_SUPPORT
130#define CONFIG_SPL_SERIAL_SUPPORT
131#define CONFIG_SPL_I2C_SUPPORT
132
133#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
134/* SPL related SPI defines */
135#define CONFIG_SPL_SPI_LOAD
136#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
137#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
138#endif
139
140#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
141/* SPL related MMC defines */
142#define CONFIG_SPL_MMC_SUPPORT
143#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
144#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
145#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
146#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
147#ifdef CONFIG_SPL_BUILD
148#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
149#endif
150#endif
151
152/*
153 * Environment Configuration
154 */
155#define CONFIG_ENV_OVERWRITE
156
157#define CONFIG_BAUDRATE 115200
158
159#define CONFIG_HOSTNAME ccdc
160#define CONFIG_ROOTPATH "/opt/nfsroot"
161#define CONFIG_BOOTFILE "ccdc.img"
162
163#define CONFIG_PREBOOT /* enable preboot variable */
164
165#define CONFIG_EXTRA_ENV_SETTINGS \
166 "netdev=eth1\0" \
167 "consoledev=ttyS1\0" \
168 "u-boot=u-boot.bin\0" \
169 "bootfile_addr=1000000\0" \
170 "keyprogram_addr=3000000\0" \
171 "keyprogram_file=keyprogram.img\0" \
172 "fdtfile=controlcenterdc.dtb\0" \
173 "load=tftpboot ${loadaddr} ${u-boot}\0" \
174 "mmcdev=0:2\0" \
175 "update=sf probe 1:0;" \
176 " sf erase 0 +${filesize};" \
177 " sf write ${fileaddr} 0 ${filesize}\0" \
178 "upd=run load update\0" \
179 "fdt_high=0x10000000\0" \
180 "initrd_high=0x10000000\0" \
181 "loadkeyprogram=tpm flush_keys;" \
182 " mmc rescan;" \
183 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
184 " source ${keyprogram_addr}:script@1\0" \
185 "gpio1=gpio@22_25\0" \
186 "gpio2=A29\0" \
187 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
188 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
189 "bootfail=for i in ${blinkseq}; do" \
190 " if test $i -eq 0; then" \
191 " gpio clear ${gpio1}; gpio set ${gpio2};" \
192 " elif test $i -eq 1; then" \
193 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
194 " elif test $i -eq 2; then" \
195 " gpio set ${gpio1}; gpio set ${gpio2};" \
196 " else;" \
197 " gpio clear ${gpio1}; gpio set ${gpio2};" \
198 " fi; sleep 0.12; done\0"
199
200#define CONFIG_NFSBOOTCOMMAND \
201 "setenv bootargs root=/dev/nfs rw " \
202 "nfsroot=${serverip}:${rootpath} " \
203 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
204 "console=${consoledev},${baudrate} ${othbootargs}; " \
205 "tftpboot ${bootfile_addr} ${bootfile}; " \
206 "bootm ${bootfile_addr}"
207
208#define CONFIG_MMCBOOTCOMMAND \
209 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
210 "console=${consoledev},${baudrate} ${othbootargs}; " \
211 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
212 "bootm ${bootfile_addr}"
213
214#define CONFIG_BOOTCOMMAND \
215 "if env exists keyprogram; then;" \
216 " setenv keyprogram; run nfsboot;" \
217 " fi;" \
218 " run dobootfail"
219
220/*
221 * mv-common.h should be defined after CMD configs since it used them
222 * to enable certain macros
223 */
224#include "mv-common.h"
225
226#endif /* _CONFIG_CONTROLCENTERDC_H */