Simon Glass | e42bff5 | 2020-09-22 12:44:48 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2016 Intel Corp. |
| 4 | * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.) |
| 5 | */ |
| 6 | |
| 7 | scope (\_SB.PCI0) { |
| 8 | |
| 9 | /* LPIO1 PWM */ |
| 10 | Device(PWM) { |
| 11 | Name (_ADR, 0x001A0000) |
| 12 | Name (_DDN, "Intel(R) PWM Controller") |
| 13 | } |
| 14 | |
| 15 | /* LPIO1 HS-UART #1 */ |
| 16 | Device(URT1) { |
| 17 | Name (_ADR, 0x00180000) |
| 18 | Name (_DDN, "Intel(R) HS-UART Controller #1") |
| 19 | } |
| 20 | |
| 21 | /* LPIO1 HS-UART #2 */ |
| 22 | Device(URT2) { |
| 23 | Name (_ADR, 0x00180001) |
| 24 | Name (_DDN, "Intel(R) HS-UART Controller #2") |
| 25 | } |
| 26 | |
| 27 | /* LPIO1 HS-UART #3 */ |
| 28 | Device(URT3) { |
| 29 | Name (_ADR, 0x00180002) |
| 30 | Name (_DDN, "Intel(R) HS-UART Controller #3") |
| 31 | } |
| 32 | |
| 33 | /* LPIO1 HS-UART #4 */ |
| 34 | Device(URT4) { |
| 35 | Name (_ADR, 0x00180003) |
| 36 | Name (_DDN, "Intel(R) HS-UART Controller #4") |
| 37 | } |
| 38 | |
| 39 | /* LPIO1 SPI */ |
| 40 | Device(SPI1) { |
| 41 | Name (_ADR, 0x00190000) |
| 42 | Name (_DDN, "Intel(R) SPI Controller #1") |
| 43 | } |
| 44 | |
| 45 | /* LPIO1 SPI #2 */ |
| 46 | Device(SPI2) { |
| 47 | Name (_ADR, 0x00190001) |
| 48 | Name (_DDN, "Intel(R) SPI Controller #2") |
| 49 | } |
| 50 | |
| 51 | /* LPIO1 SPI #3 */ |
| 52 | Device(SPI3) { |
| 53 | Name (_ADR, 0x00190002) |
| 54 | Name (_DDN, "Intel(R) SPI Controller #3") |
| 55 | } |
| 56 | |
| 57 | |
| 58 | /* LPIO2 I2C #0 */ |
| 59 | Device(I2C0) { |
| 60 | Name (_ADR, 0x00160000) |
| 61 | Name (_DDN, "Intel(R) I2C Controller #0") |
| 62 | } |
| 63 | |
| 64 | /* LPIO2 I2C #1 */ |
| 65 | Device(I2C1) { |
| 66 | Name (_ADR, 0x00160001) |
| 67 | Name (_DDN, "Intel(R) I2C Controller #1") |
| 68 | } |
| 69 | |
| 70 | /* LPIO2 I2C #2 */ |
| 71 | Device(I2C2) { |
| 72 | Name (_ADR, 0x00160002) |
| 73 | Name (_DDN, "Intel(R) I2C Controller #2") |
| 74 | } |
| 75 | |
| 76 | /* LPIO2 I2C #3 */ |
| 77 | Device(I2C3) { |
| 78 | Name (_ADR, 0x00160003) |
| 79 | Name (_DDN, "Intel(R) I2C Controller #3") |
| 80 | } |
| 81 | |
| 82 | /* LPIO2 I2C #4 */ |
| 83 | Device(I2C4) { |
| 84 | Name (_ADR, 0x00170000) |
| 85 | Name (_DDN, "Intel(R) I2C Controller #4") |
| 86 | } |
| 87 | |
| 88 | /* LPIO2 I2C #5 */ |
| 89 | Device(I2C5) { |
| 90 | Name (_ADR, 0x00170001) |
| 91 | Name (_DDN, "Intel(R) I2C Controller #5") |
| 92 | } |
| 93 | |
| 94 | /* LPIO2 I2C #6 */ |
| 95 | Device(I2C6) { |
| 96 | Name (_ADR, 0x00170002) |
| 97 | Name (_DDN, "Intel(R) I2C Controller #6") |
| 98 | } |
| 99 | |
| 100 | /* LPIO2 I2C #7 */ |
| 101 | Device(I2C7) { |
| 102 | Name (_ADR, 0x00170003) |
| 103 | Name (_DDN, "Intel(R) I2C Controller #7") |
| 104 | } |
| 105 | } |