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git01.mediatek.com / filogic / uboot / e012fc1316b1c5841818d59bff80534d433ccfec / . / configs / ethernut5_defconfig
blob: b14cf6c8e41ac7e191edeec8ff61aa85b4fdff8f [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]2CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x27000000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]4CONFIG_TARGET_ETHERNUT5=y
Wenyou.Yang@microchip.comc99bfb42017-07-21 14:30:57 +0800[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rinif2260382018-08-16 08:16:24 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]7CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]8CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]9CONFIG_USE_BOOTARGS=y
10CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2"
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]11# CONFIG_DISPLAY_BOARDINFO is not set
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]12CONFIG_HUSH_PARSER=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]13# CONFIG_AUTO_COMPLETE is not set
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]14CONFIG_SYS_PROMPT="U-Boot> "
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]15# CONFIG_CMD_BDI is not set
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]16CONFIG_CMD_IMLS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]17CONFIG_CMD_ASKENV=y
Masahiro Yamada2737fd32017-02-05 10:42:56 +0900[diff] [blame]18CONFIG_CMD_UNZIP=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]19CONFIG_CMD_I2C=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]20# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]22CONFIG_CMD_NAND=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]23CONFIG_CMD_SAVES=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]24CONFIG_CMD_SF=y
25CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]26CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]27CONFIG_CMD_DHCP=y
Tom Rinie8f8d672018-04-17 09:22:31 -0400[diff] [blame]28CONFIG_CMD_RARP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]30CONFIG_CMD_PING=y
31CONFIG_CMD_CDP=y
32CONFIG_CMD_SNTP=y
33CONFIG_CMD_DNS=y
Simon Glassffab9a02017-04-26 22:27:56 -0600[diff] [blame]34CONFIG_CMD_BSP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_CACHE=y
Chris Packham3e257df2017-04-29 15:20:28 +1200[diff] [blame]36CONFIG_CMD_DATE=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]37CONFIG_CMD_EXT2=y
38CONFIG_CMD_FAT=y
Simon Glassc4abb4b2017-05-17 03:25:37 -0600[diff] [blame]39CONFIG_CMD_JFFS2=y
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]40CONFIG_CMD_MTDPARTS=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]41CONFIG_MTDIDS_DEFAULT="nand0=atmel_nand"
42CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:-(root)"
Simon Glassed4ee312017-08-04 16:34:41 -0600[diff] [blame]43CONFIG_CMD_REISER=y
Heiko Schocher09dbb852016-09-21 07:58:19 +0200[diff] [blame]44CONFIG_CMD_UBI=y
Wenyou.Yang@microchip.comc99bfb42017-07-21 14:30:57 +0800[diff] [blame]45CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]46CONFIG_DEFAULT_DEVICE_TREE="ethernut5"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]47CONFIG_ENV_IS_IN_SPI_FLASH=y
Wenyou.Yang@microchip.comc99bfb42017-07-21 14:30:57 +0800[diff] [blame]48CONFIG_DM=y
49CONFIG_CLK=y
50CONFIG_CLK_AT91=y
51CONFIG_DM_GPIO=y
52CONFIG_AT91_GPIO=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]53CONFIG_MTD_NOR_FLASH=y
Adam Ford9c519182018-07-08 08:11:07 -0500[diff] [blame]54CONFIG_NAND=y
55CONFIG_NAND_ATMEL=y
Wenyou.Yang@microchip.comc99bfb42017-07-21 14:30:57 +0800[diff] [blame]56CONFIG_DM_SPI_FLASH=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]57CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]58CONFIG_SPI_FLASH_ATMEL=y
Wenyou.Yang@microchip.comc99bfb42017-07-21 14:30:57 +0800[diff] [blame]59CONFIG_SPI_FLASH_DATAFLASH=y
60CONFIG_PINCTRL=y
61CONFIG_PINCTRL_AT91=y
62CONFIG_DM_SERIAL=y
63CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]64CONFIG_SPI=y
Wenyou.Yang@microchip.comc99bfb42017-07-21 14:30:57 +0800[diff] [blame]65CONFIG_DM_SPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]66CONFIG_USB=y
67CONFIG_USB_STORAGE=y