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git01.mediatek.com / filogic / uboot / e0098b37e8ef439be12d3ae96bd5afea09077ba9 / . / arch / arm / include / asm / arch-exynos / pwm.h
blob: 43474c34b0c5d854a6ab633018c2fe54e8da0012 [file] [log] [blame]
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]1/*
2 * Copyright (C) 2009 Samsung Electronics
3 * Kyungmin Park <kyungmin.park@samsung.com>
4 * Minkyu Kang <mk7.kang@samsung.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]6 * SPDX-License-Identifier: GPL-2.0+
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]7 */
8
9#ifndef __ASM_ARM_ARCH_PWM_H_
10#define __ASM_ARM_ARCH_PWM_H_
11
Donghwa Lee85f5df22011-03-07 21:11:42 +0000[diff] [blame]12#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */
13#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */
14
15/* Divider MUX */
16#define MUX_DIV_1 0 /* 1/1 period */
17#define MUX_DIV_2 1 /* 1/2 period */
18#define MUX_DIV_4 2 /* 1/4 period */
19#define MUX_DIV_8 3 /* 1/8 period */
20#define MUX_DIV_16 4 /* 1/16 period */
21
22#define MUX_DIV_SHIFT(x) (x * 4)
23
Donghwa Lee85f5df22011-03-07 21:11:42 +0000[diff] [blame]24#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2)
25
26#define TCON_START(x) (1 << TCON_OFFSET(x))
27#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1))
28#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2))
29#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3))
Minkyu Kangda0bff82011-03-10 20:05:58 +0900[diff] [blame]30#define TCON4_AUTO_RELOAD (1 << 22)
Donghwa Lee85f5df22011-03-07 21:11:42 +0000[diff] [blame]31
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]32#ifndef __ASSEMBLY__
33struct s5p_timer {
34 unsigned int tcfg0;
35 unsigned int tcfg1;
36 unsigned int tcon;
37 unsigned int tcntb0;
38 unsigned int tcmpb0;
39 unsigned int tcnto0;
40 unsigned int tcntb1;
41 unsigned int tcmpb1;
42 unsigned int tcnto1;
43 unsigned int tcntb2;
44 unsigned int tcmpb2;
45 unsigned int tcnto2;
46 unsigned int tcntb3;
Chander Kashyap9d599cb2011-12-18 22:56:43 +0000[diff] [blame]47 unsigned int tcmpb3;
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]48 unsigned int tcnto3;
49 unsigned int tcntb4;
50 unsigned int tcnto4;
51 unsigned int tintcstat;
52};
53#endif /* __ASSEMBLY__ */
54
55#endif