Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / dfe7fab32df5c2fb36d68f5c9504fd971836247d / . / configs / evb-rk3399_defconfig
blob: 3f4128375a82302e8bf11474aa9542a276660e8f [file] [log] [blame]
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00200000
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]4CONFIG_SPL_LIBCOMMON_SUPPORT=y
5CONFIG_SPL_LIBGENERIC_SUPPORT=y
6CONFIG_SYS_MALLOC_F_LEN=0x4000
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]7CONFIG_ROCKCHIP_RK3399=y
Kever Yang60a50072017-12-18 15:13:19 +0800[diff] [blame]8CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]9CONFIG_DEBUG_UART_BASE=0xFF1A0000
10CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]11CONFIG_SPL_STACK_R_ADDR=0x80000
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]13CONFIG_DEBUG_UART=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]14CONFIG_FIT=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]15CONFIG_SPL_LOAD_FIT=y
Peter Robinson03b75222018-04-25 10:50:05 +0100[diff] [blame]16CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]17# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]18CONFIG_DISPLAY_BOARDINFO_LATE=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]19CONFIG_SPL_STACK_R=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]20CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
Tom Rini2cbc1202018-04-28 10:45:55 -0400[diff] [blame]21CONFIG_SPL_ATF=y
22CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]23CONFIG_CMD_BOOTZ=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]24CONFIG_CMD_GPT=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]25CONFIG_CMD_MMC=y
26CONFIG_CMD_SF=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]27CONFIG_CMD_USB=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]28# CONFIG_CMD_SETEXPR is not set
29CONFIG_CMD_TIME=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]30CONFIG_SPL_OF_CONTROL=y
31CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
32CONFIG_SPL_OF_PLATDATA=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]33CONFIG_ENV_IS_IN_MMC=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]34CONFIG_NET_RANDOM_ETHADDR=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]35CONFIG_REGMAP=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]36CONFIG_SPL_REGMAP=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]37CONFIG_SYSCON=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]38CONFIG_SPL_SYSCON=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]39CONFIG_CLK=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]40CONFIG_SPL_CLK=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]41CONFIG_ROCKCHIP_GPIO=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]42CONFIG_SYS_I2C_ROCKCHIP=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]43CONFIG_MMC_DW=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]44CONFIG_MMC_SDHCI=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]45CONFIG_MMC_SDHCI_ROCKCHIP=y
Kever Yang92830982017-05-01 16:16:01 -0600[diff] [blame]46CONFIG_DM_ETH=y
47CONFIG_ETH_DESIGNWARE=y
Kever Yang92830982017-05-01 16:16:01 -0600[diff] [blame]48CONFIG_GMAC_ROCKCHIP=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]49CONFIG_PINCTRL=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]50CONFIG_SPL_PINCTRL=y
Philipp Tomsicha1dcf3c2017-04-19 16:46:37 +0200[diff] [blame]51CONFIG_PINCTRL_ROCKCHIP_RK3399=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]52CONFIG_DM_PMIC=y
Jacob Chen614704b2017-05-02 14:54:52 +0800[diff] [blame]53CONFIG_PMIC_RK8XX=y
Kever Yangbbdbec72016-09-23 15:57:23 +0800[diff] [blame]54CONFIG_REGULATOR_PWM=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]55CONFIG_DM_REGULATOR_FIXED=y
Jacob Chen614704b2017-05-02 14:54:52 +0800[diff] [blame]56CONFIG_REGULATOR_RK8XX=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]57CONFIG_PWM_ROCKCHIP=y
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]58CONFIG_RAM=y
Kever Yang16efdfd2017-02-22 16:56:38 +0800[diff] [blame]59CONFIG_SPL_RAM=y
Philipp Tomsich29c8bc02017-03-17 20:34:53 +0100[diff] [blame]60CONFIG_BAUDRATE=1500000
Kever Yang974b6f32016-07-19 21:17:00 +0800[diff] [blame]61CONFIG_DEBUG_UART_SHIFT=2
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]62CONFIG_SYSRESET=y
MengDongyang0a8ea092016-08-24 12:02:19 +0800[diff] [blame]63CONFIG_USB=y
MengDongyang0a8ea092016-08-24 12:02:19 +0800[diff] [blame]64CONFIG_USB_XHCI_HCD=y
65CONFIG_USB_XHCI_DWC3=y
66CONFIG_USB_EHCI_HCD=y
67CONFIG_USB_EHCI_GENERIC=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]68CONFIG_USB_STORAGE=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]69CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]70CONFIG_USB_ETHER_ASIX=y
71CONFIG_USB_ETHER_ASIX88179=y
72CONFIG_USB_ETHER_MCS7830=y
73CONFIG_USB_ETHER_RTL8152=y
74CONFIG_USB_ETHER_SMSC95XX=y
Eric Gao1bec3f22017-05-02 18:23:57 +0800[diff] [blame]75CONFIG_DM_VIDEO=y
76CONFIG_DISPLAY=y
77CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.com64ee9f62017-06-21 11:20:32 +0800[diff] [blame]78CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1200
Eric Gao1bec3f22017-05-02 18:23:57 +0800[diff] [blame]79CONFIG_DISPLAY_ROCKCHIP_MIPI=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]80CONFIG_USE_TINY_PRINTF=y
81CONFIG_ERRNO_STR=y