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Lokesh Vutla3e716e22013-02-17 23:34:35 +00001/*
2 * (C) Copyright 2013
3 * Texas Instruments Incorporated.
4 * Sricharan R <r.sricharan@ti.com>
5 *
6 * Derived from OMAP4 done by:
7 * Aneesh V <aneesh@ti.com>
8 *
9 * TI OMAP5 AND DRA7XX common configuration settings
10 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020011 * SPDX-License-Identifier: GPL-2.0+
Tom Rinib3277f52013-08-09 11:22:18 -040012 *
13 * For more details, please see the technical documents listed at
14 * http://www.ti.com/product/omap5432
Lokesh Vutla3e716e22013-02-17 23:34:35 +000015 */
16
Enric Balletbò i Serra2785bb72013-12-06 21:30:19 +010017#ifndef __CONFIG_TI_OMAP5_COMMON_H
18#define __CONFIG_TI_OMAP5_COMMON_H
Lokesh Vutla3e716e22013-02-17 23:34:35 +000019
Lokesh Vutla3e716e22013-02-17 23:34:35 +000020#define CONFIG_DISPLAY_CPUINFO
21#define CONFIG_DISPLAY_BOARDINFO
Tom Rinib3277f52013-08-09 11:22:18 -040022#define CONFIG_ARCH_CPU_INIT
Lokesh Vutla3e716e22013-02-17 23:34:35 +000023
Praveen Rao3206b8a2015-03-09 17:12:06 -050024/* Common ARM Erratas */
25#define CONFIG_ARM_ERRATA_798870
26
Tom Rinib3277f52013-08-09 11:22:18 -040027#define CONFIG_SYS_CACHELINE_SIZE 64
Lokesh Vutla3e716e22013-02-17 23:34:35 +000028
Tom Rinib3277f52013-08-09 11:22:18 -040029/* Use General purpose timer 1 */
30#define CONFIG_SYS_TIMERBASE GPT2_BASE
Lokesh Vutla3e716e22013-02-17 23:34:35 +000031
Tom Rini21089602013-08-20 08:53:52 -040032/*
33 * For the DDR timing information we can either dynamically determine
34 * the timings to use or use pre-determined timings (based on using the
35 * dynamic method. Default to the static timing infomation.
36 */
Tom Rinib3277f52013-08-09 11:22:18 -040037#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
Tom Rinib3277f52013-08-09 11:22:18 -040038#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
39#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
40#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
41#endif
42
43#ifndef CONFIG_SPL_BUILD
44#define CONFIG_PALMAS_POWER
45#endif
46
47#include <asm/arch/cpu.h>
48#include <asm/arch/omap.h>
49
Tom Rinib3277f52013-08-09 11:22:18 -040050#include <configs/ti_armv7_common.h>
Lokesh Vutla3e716e22013-02-17 23:34:35 +000051
52/*
Tom Rinib3277f52013-08-09 11:22:18 -040053 * Hardware drivers
Lokesh Vutla3e716e22013-02-17 23:34:35 +000054 */
Lokesh Vutla3e716e22013-02-17 23:34:35 +000055#define CONFIG_SYS_NS16550
56#define CONFIG_SYS_NS16550_SERIAL
57#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Tom Rinib3277f52013-08-09 11:22:18 -040058#define CONFIG_SYS_NS16550_CLK 48000000
Lokesh Vutla3e716e22013-02-17 23:34:35 +000059
Tom Rinib3277f52013-08-09 11:22:18 -040060/* Per-SoC commands */
Lokesh Vutla3e716e22013-02-17 23:34:35 +000061#undef CONFIG_CMD_NET
62#undef CONFIG_CMD_NFS
Lokesh Vutla3e716e22013-02-17 23:34:35 +000063
64/*
65 * Environment setup
66 */
Tom Rini546c6c12013-04-05 06:21:45 +000067#ifndef PARTS_DEFAULT
68#define PARTS_DEFAULT
69#endif
70
Lokesh Vutla6d576a72014-07-14 19:57:58 +053071#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Lokesh Vutla3e716e22013-02-17 23:34:35 +000072#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rini96886f22014-03-28 15:03:29 -040073 DEFAULT_LINUX_BOOT_ENV \
Tom Rinie0f6fba2013-10-18 18:04:19 -040074 "console=" CONSOLEDEV ",115200n8\0" \
Dan Murphyff302722013-06-06 13:27:06 -050075 "fdtfile=undefined\0" \
SRICHARAN R14a95192013-04-04 23:39:27 +000076 "bootpart=0:2\0" \
77 "bootdir=/boot\0" \
SRICHARAN R31d0c152013-04-04 23:39:47 +000078 "bootfile=zImage\0" \
Lokesh Vutla3e716e22013-02-17 23:34:35 +000079 "usbtty=cdc_acm\0" \
80 "vram=16M\0" \
Tom Rini546c6c12013-04-05 06:21:45 +000081 "partitions=" PARTS_DEFAULT "\0" \
Tom Rini891918a2013-04-11 05:22:10 +000082 "optargs=\0" \
Lokesh Vutla3e716e22013-02-17 23:34:35 +000083 "mmcdev=0\0" \
Franklin S Cooper Jrb5895352014-11-06 08:28:47 -060084 "mmcroot=/dev/mmcblk0p2 rw\0" \
Tom Rini54e2c2f42013-04-11 08:01:42 +000085 "mmcrootfstype=ext4 rootwait\0" \
Lokesh Vutla3e716e22013-02-17 23:34:35 +000086 "mmcargs=setenv bootargs console=${console} " \
Tom Rini891918a2013-04-11 05:22:10 +000087 "${optargs} " \
Lokesh Vutla3e716e22013-02-17 23:34:35 +000088 "vram=${vram} " \
89 "root=${mmcroot} " \
90 "rootfstype=${mmcrootfstype}\0" \
Cooper Jr., Franklinb61bb802014-12-04 11:27:05 -060091 "netargs=setenv bootargs console=${console} " \
92 "${optargs} " \
93 "root=/dev/nfs " \
94 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
95 "ip=dhcp\0" \
Lokesh Vutla3e716e22013-02-17 23:34:35 +000096 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
97 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
98 "source ${loadaddr}\0" \
Cooper Jr., Franklinb61bb802014-12-04 11:27:05 -060099 "bootenv=uEnv.txt\0" \
100 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
Nishanth Menon5277c8f2013-04-01 05:52:40 +0000101 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
102 "env import -t ${loadaddr} ${filesize}\0" \
SRICHARAN R14a95192013-04-04 23:39:27 +0000103 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
Tom Rinib6ba9992013-10-09 10:59:33 -0400104 "mmcboot=mmc dev ${mmcdev}; " \
105 "if mmc rescan; then " \
106 "echo SD/MMC found on device ${mmcdev};" \
107 "if run loadbootenv; then " \
108 "echo Loaded environment from ${bootenv};" \
109 "run importbootenv;" \
110 "fi;" \
111 "if test -n $uenvcmd; then " \
112 "echo Running uenvcmd ...;" \
113 "run uenvcmd;" \
114 "fi;" \
115 "if run loadimage; then " \
116 "run loadfdt; " \
117 "echo Booting from mmc${mmcdev} ...; " \
118 "run mmcargs; " \
119 "bootz ${loadaddr} - ${fdtaddr}; " \
120 "fi;" \
121 "fi;\0" \
Cooper Jr., Franklinb61bb802014-12-04 11:27:05 -0600122 "netboot=echo Booting from network ...; " \
123 "set env autoload no; " \
124 "dhcp; " \
125 "tftp ${loadaddr} ${bootfile}; " \
126 "tftp ${fdtaddr} ${fdtfile}; " \
127 "run netargs; " \
128 "bootz ${loadaddr} - ${fdtaddr}\0" \
SRICHARAN R14a95192013-04-04 23:39:27 +0000129 "findfdt="\
130 "if test $board_name = omap5_uevm; then " \
Dan Murphyff302722013-06-06 13:27:06 -0500131 "setenv fdtfile omap5-uevm.dtb; fi; " \
Dan Murphya6f9d152013-06-11 11:22:30 -0500132 "if test $board_name = dra7xx; then " \
133 "setenv fdtfile dra7-evm.dtb; fi;" \
Lokesh Vutla6d576a72014-07-14 19:57:58 +0530134 "if test $board_name = dra72x; then " \
135 "setenv fdtfile dra72-evm.dtb; fi;" \
Felipe Balbi4750eb62014-11-10 14:02:44 -0600136 "if test $board_name = beagle_x15; then " \
137 "setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
Dan Murphyff302722013-06-06 13:27:06 -0500138 "if test $fdtfile = undefined; then " \
139 "echo WARNING: Could not determine device tree to use; fi; \0" \
SRICHARAN R14a95192013-04-04 23:39:27 +0000140 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \
Lokesh Vutla3e716e22013-02-17 23:34:35 +0000141
142#define CONFIG_BOOTCOMMAND \
SRICHARAN R14a95192013-04-04 23:39:27 +0000143 "run findfdt; " \
Tom Rinib6ba9992013-10-09 10:59:33 -0400144 "run mmcboot;" \
145 "setenv mmcdev 1; " \
146 "setenv bootpart 1:2; " \
147 "setenv mmcroot /dev/mmcblk0p2 rw; " \
148 "run mmcboot;" \
Lokesh Vutla3e716e22013-02-17 23:34:35 +0000149
Balaji T K8372baf2013-06-06 05:04:32 +0000150
Tom Rini21089602013-08-20 08:53:52 -0400151/*
152 * SPL related defines. The Public RAM memory map the ROM defines the
153 * area between 0x40300000 and 0x4031E000 as a download area for OMAP5
154 * (dra7xx is larger, but we do not need to be larger at this time). We
155 * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and
156 * print some information.
157 */
Tom Rinif7875682013-08-20 08:53:45 -0400158#define CONFIG_SPL_TEXT_BASE 0x40300000
159#define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE)
Lokesh Vutla3e716e22013-02-17 23:34:35 +0000160#define CONFIG_SPL_DISPLAY_PRINT
Lokesh Vutla3e716e22013-02-17 23:34:35 +0000161#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
Tom Rinid9f808d2014-04-03 07:52:53 -0400162#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
163 (128 << 20))
Lokesh Vutla3e716e22013-02-17 23:34:35 +0000164
Enric Balletbò i Serra47858592013-12-06 21:30:20 +0100165#ifdef CONFIG_NAND
166#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
167#endif
168
Enric Balletbò i Serra2785bb72013-12-06 21:30:19 +0100169#endif /* __CONFIG_TI_OMAP5_COMMON_H */