Masahiro Yamada | cc85b7b | 2015-07-26 02:46:26 +0900 | [diff] [blame] | 1 | # |
| 2 | # Video configuration |
| 3 | # |
| 4 | |
| 5 | menu "Graphics support" |
| 6 | |
Simon Glass | 42bf3ee | 2014-12-29 19:32:28 -0700 | [diff] [blame] | 7 | config VIDEO_VESA |
| 8 | bool "Enable VESA video driver support" |
Simon Glass | 42bf3ee | 2014-12-29 19:32:28 -0700 | [diff] [blame] | 9 | default n |
| 10 | help |
| 11 | Turn on this option to enable a very simple driver which uses vesa |
| 12 | to discover the video mode and then provides a frame buffer for use |
| 13 | by U-Boot. This can in principle be used with any platform that |
| 14 | supports PCI and video cards that support VESA BIOS Extension (VBE). |
| 15 | |
Bin Meng | 072b79d | 2015-05-11 07:36:29 +0800 | [diff] [blame] | 16 | config FRAMEBUFFER_SET_VESA_MODE |
| 17 | bool "Set framebuffer graphics resolution" |
| 18 | depends on VIDEO_VESA |
| 19 | help |
| 20 | Set VESA/native framebuffer mode (needed for bootsplash and graphical |
| 21 | framebuffer console) |
| 22 | |
| 23 | choice |
| 24 | prompt "framebuffer graphics resolution" |
| 25 | default FRAMEBUFFER_VESA_MODE_117 |
| 26 | depends on FRAMEBUFFER_SET_VESA_MODE |
| 27 | help |
| 28 | This option sets the resolution used for the U-Boot framebuffer (and |
| 29 | bootsplash screen). |
| 30 | |
| 31 | config FRAMEBUFFER_VESA_MODE_100 |
| 32 | bool "640x400 256-color" |
| 33 | |
| 34 | config FRAMEBUFFER_VESA_MODE_101 |
| 35 | bool "640x480 256-color" |
| 36 | |
| 37 | config FRAMEBUFFER_VESA_MODE_102 |
| 38 | bool "800x600 16-color" |
| 39 | |
| 40 | config FRAMEBUFFER_VESA_MODE_103 |
| 41 | bool "800x600 256-color" |
| 42 | |
| 43 | config FRAMEBUFFER_VESA_MODE_104 |
| 44 | bool "1024x768 16-color" |
| 45 | |
| 46 | config FRAMEBUFFER_VESA_MODE_105 |
| 47 | bool "1024x7686 256-color" |
| 48 | |
| 49 | config FRAMEBUFFER_VESA_MODE_106 |
| 50 | bool "1280x1024 16-color" |
| 51 | |
| 52 | config FRAMEBUFFER_VESA_MODE_107 |
| 53 | bool "1280x1024 256-color" |
| 54 | |
| 55 | config FRAMEBUFFER_VESA_MODE_108 |
| 56 | bool "80x60 text" |
| 57 | |
| 58 | config FRAMEBUFFER_VESA_MODE_109 |
| 59 | bool "132x25 text" |
| 60 | |
| 61 | config FRAMEBUFFER_VESA_MODE_10A |
| 62 | bool "132x43 text" |
| 63 | |
| 64 | config FRAMEBUFFER_VESA_MODE_10B |
| 65 | bool "132x50 text" |
| 66 | |
| 67 | config FRAMEBUFFER_VESA_MODE_10C |
| 68 | bool "132x60 text" |
| 69 | |
| 70 | config FRAMEBUFFER_VESA_MODE_10D |
| 71 | bool "320x200 32k-color (1:5:5:5)" |
| 72 | |
| 73 | config FRAMEBUFFER_VESA_MODE_10E |
| 74 | bool "320x200 64k-color (5:6:5)" |
| 75 | |
| 76 | config FRAMEBUFFER_VESA_MODE_10F |
| 77 | bool "320x200 16.8M-color (8:8:8)" |
| 78 | |
| 79 | config FRAMEBUFFER_VESA_MODE_110 |
| 80 | bool "640x480 32k-color (1:5:5:5)" |
| 81 | |
| 82 | config FRAMEBUFFER_VESA_MODE_111 |
| 83 | bool "640x480 64k-color (5:6:5)" |
| 84 | |
| 85 | config FRAMEBUFFER_VESA_MODE_112 |
| 86 | bool "640x480 16.8M-color (8:8:8)" |
| 87 | |
| 88 | config FRAMEBUFFER_VESA_MODE_113 |
| 89 | bool "800x600 32k-color (1:5:5:5)" |
| 90 | |
| 91 | config FRAMEBUFFER_VESA_MODE_114 |
| 92 | bool "800x600 64k-color (5:6:5)" |
| 93 | |
| 94 | config FRAMEBUFFER_VESA_MODE_115 |
| 95 | bool "800x600 16.8M-color (8:8:8)" |
| 96 | |
| 97 | config FRAMEBUFFER_VESA_MODE_116 |
| 98 | bool "1024x768 32k-color (1:5:5:5)" |
| 99 | |
| 100 | config FRAMEBUFFER_VESA_MODE_117 |
| 101 | bool "1024x768 64k-color (5:6:5)" |
| 102 | |
| 103 | config FRAMEBUFFER_VESA_MODE_118 |
| 104 | bool "1024x768 16.8M-color (8:8:8)" |
| 105 | |
| 106 | config FRAMEBUFFER_VESA_MODE_119 |
| 107 | bool "1280x1024 32k-color (1:5:5:5)" |
| 108 | |
| 109 | config FRAMEBUFFER_VESA_MODE_11A |
| 110 | bool "1280x1024 64k-color (5:6:5)" |
| 111 | |
| 112 | config FRAMEBUFFER_VESA_MODE_11B |
| 113 | bool "1280x1024 16.8M-color (8:8:8)" |
| 114 | |
| 115 | config FRAMEBUFFER_VESA_MODE_USER |
| 116 | bool "Manually select VESA mode" |
| 117 | |
| 118 | endchoice |
| 119 | |
| 120 | # Map the config names to an integer (KB). |
| 121 | config FRAMEBUFFER_VESA_MODE |
| 122 | prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER |
| 123 | hex |
| 124 | default 0x100 if FRAMEBUFFER_VESA_MODE_100 |
| 125 | default 0x101 if FRAMEBUFFER_VESA_MODE_101 |
| 126 | default 0x102 if FRAMEBUFFER_VESA_MODE_102 |
| 127 | default 0x103 if FRAMEBUFFER_VESA_MODE_103 |
| 128 | default 0x104 if FRAMEBUFFER_VESA_MODE_104 |
| 129 | default 0x105 if FRAMEBUFFER_VESA_MODE_105 |
| 130 | default 0x106 if FRAMEBUFFER_VESA_MODE_106 |
| 131 | default 0x107 if FRAMEBUFFER_VESA_MODE_107 |
| 132 | default 0x108 if FRAMEBUFFER_VESA_MODE_108 |
| 133 | default 0x109 if FRAMEBUFFER_VESA_MODE_109 |
| 134 | default 0x10A if FRAMEBUFFER_VESA_MODE_10A |
| 135 | default 0x10B if FRAMEBUFFER_VESA_MODE_10B |
| 136 | default 0x10C if FRAMEBUFFER_VESA_MODE_10C |
| 137 | default 0x10D if FRAMEBUFFER_VESA_MODE_10D |
| 138 | default 0x10E if FRAMEBUFFER_VESA_MODE_10E |
| 139 | default 0x10F if FRAMEBUFFER_VESA_MODE_10F |
| 140 | default 0x110 if FRAMEBUFFER_VESA_MODE_110 |
| 141 | default 0x111 if FRAMEBUFFER_VESA_MODE_111 |
| 142 | default 0x112 if FRAMEBUFFER_VESA_MODE_112 |
| 143 | default 0x113 if FRAMEBUFFER_VESA_MODE_113 |
| 144 | default 0x114 if FRAMEBUFFER_VESA_MODE_114 |
| 145 | default 0x115 if FRAMEBUFFER_VESA_MODE_115 |
| 146 | default 0x116 if FRAMEBUFFER_VESA_MODE_116 |
| 147 | default 0x117 if FRAMEBUFFER_VESA_MODE_117 |
| 148 | default 0x118 if FRAMEBUFFER_VESA_MODE_118 |
| 149 | default 0x119 if FRAMEBUFFER_VESA_MODE_119 |
| 150 | default 0x11A if FRAMEBUFFER_VESA_MODE_11A |
| 151 | default 0x11B if FRAMEBUFFER_VESA_MODE_11B |
| 152 | default 0x117 if FRAMEBUFFER_VESA_MODE_USER |
| 153 | |
Hans de Goede | dfc1efe | 2015-08-08 16:03:29 +0200 | [diff] [blame^] | 154 | config VIDEO_LCD_ANX9804 |
| 155 | bool "ANX9804 bridge chip" |
| 156 | default n |
| 157 | ---help--- |
| 158 | Support for the ANX9804 bridge chip, which can take pixel data coming |
| 159 | from a parallel LCD interface and translate it on the fy into a DP |
| 160 | interface for driving eDP TFT displays. It uses I2C for configuration. |
| 161 | |
Siarhei Siamashka | 4c19cf2 | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 162 | config VIDEO_LCD_SSD2828 |
| 163 | bool "SSD2828 bridge chip" |
| 164 | default n |
| 165 | ---help--- |
| 166 | Support for the SSD2828 bridge chip, which can take pixel data coming |
| 167 | from a parallel LCD interface and translate it on the fly into MIPI DSI |
| 168 | interface for driving a MIPI compatible LCD panel. It uses SPI for |
| 169 | configuration. |
| 170 | |
| 171 | config VIDEO_LCD_SSD2828_TX_CLK |
| 172 | int "SSD2828 TX_CLK frequency (in MHz)" |
| 173 | depends on VIDEO_LCD_SSD2828 |
Siarhei Siamashka | 61fb91f | 2015-01-19 05:23:35 +0200 | [diff] [blame] | 174 | default 0 |
Siarhei Siamashka | 4c19cf2 | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 175 | ---help--- |
| 176 | The frequency of the crystal, which is clocking SSD2828. It may be |
| 177 | anything in the 8MHz-30MHz range and the exact value should be |
| 178 | retrieved from the board schematics. Or in the case of Allwinner |
| 179 | hardware, it can be usually found as 'lcd_xtal_freq' variable in |
Siarhei Siamashka | 61fb91f | 2015-01-19 05:23:35 +0200 | [diff] [blame] | 180 | FEX files. It can be also set to 0 for selecting PCLK from the |
| 181 | parallel LCD interface instead of TX_CLK as the PLL clock source. |
Siarhei Siamashka | 4c19cf2 | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 182 | |
| 183 | config VIDEO_LCD_SSD2828_RESET |
| 184 | string "RESET pin of SSD2828" |
| 185 | depends on VIDEO_LCD_SSD2828 |
| 186 | default "" |
| 187 | ---help--- |
| 188 | The reset pin of SSD2828 chip. This takes a string in the format |
| 189 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 190 | |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 191 | config VIDEO_LCD_HITACHI_TX18D42VM |
| 192 | bool "Hitachi tx18d42vm LVDS LCD panel support" |
| 193 | depends on VIDEO |
| 194 | default n |
| 195 | ---help--- |
| 196 | Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a |
| 197 | lcd controller which needs to be initialized over SPI, once that is |
| 198 | done they work like a regular LVDS panel. |
| 199 | |
Siarhei Siamashka | 4c19cf2 | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 200 | config VIDEO_LCD_SPI_CS |
| 201 | string "SPI CS pin for LCD related config job" |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 202 | depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM |
Siarhei Siamashka | 4c19cf2 | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 203 | default "" |
| 204 | ---help--- |
| 205 | This is one of the SPI communication pins, involved in setting up a |
| 206 | working LCD configuration. The exact role of SPI may differ for |
| 207 | different hardware setups. The option takes a string in the format |
| 208 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 209 | |
| 210 | config VIDEO_LCD_SPI_SCLK |
| 211 | string "SPI SCLK pin for LCD related config job" |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 212 | depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM |
Siarhei Siamashka | 4c19cf2 | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 213 | default "" |
| 214 | ---help--- |
| 215 | This is one of the SPI communication pins, involved in setting up a |
| 216 | working LCD configuration. The exact role of SPI may differ for |
| 217 | different hardware setups. The option takes a string in the format |
| 218 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 219 | |
| 220 | config VIDEO_LCD_SPI_MOSI |
| 221 | string "SPI MOSI pin for LCD related config job" |
Hans de Goede | c048203 | 2015-01-20 09:22:26 +0100 | [diff] [blame] | 222 | depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM |
Siarhei Siamashka | 4c19cf2 | 2015-01-19 05:23:32 +0200 | [diff] [blame] | 223 | default "" |
| 224 | ---help--- |
| 225 | This is one of the SPI communication pins, involved in setting up a |
| 226 | working LCD configuration. The exact role of SPI may differ for |
| 227 | different hardware setups. The option takes a string in the format |
| 228 | understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. |
| 229 | |
| 230 | config VIDEO_LCD_SPI_MISO |
| 231 | string "SPI MISO pin for LCD related config job (optional)" |
| 232 | depends on VIDEO_LCD_SSD2828 |
| 233 | default "" |
| 234 | ---help--- |
| 235 | This is one of the SPI communication pins, involved in setting up a |
| 236 | working LCD configuration. The exact role of SPI may differ for |
| 237 | different hardware setups. If wired up, this pin may provide additional |
| 238 | useful functionality. Such as bi-directional communication with the |
| 239 | hardware and LCD panel id retrieval (if the panel can report it). The |
| 240 | option takes a string in the format understood by 'name_to_gpio' |
| 241 | function, e.g. PH1 for pin 1 of port H. |
Simon Glass | 06679ad | 2015-04-14 21:03:38 -0600 | [diff] [blame] | 242 | |
| 243 | config DISPLAY_PORT |
| 244 | bool "Enable DisplayPort support" |
| 245 | help |
| 246 | eDP (Embedded DisplayPort) is a standard widely used in laptops |
| 247 | to drive LCD panels. This framework provides support for enabling |
| 248 | these displays where supported by the video hardware. |
Simon Glass | 3ef2a72 | 2015-04-14 21:03:42 -0600 | [diff] [blame] | 249 | |
| 250 | config VIDEO_TEGRA124 |
| 251 | bool "Enable video support on Tegra124" |
| 252 | help |
| 253 | Tegra124 supports many video output options including eDP and |
| 254 | HDMI. At present only eDP is supported by U-Boot. This option |
| 255 | enables this support which can be used on devices which |
| 256 | have an eDP display connected. |
Simon Glass | 7cf1757 | 2015-07-02 18:16:08 -0600 | [diff] [blame] | 257 | |
| 258 | source "drivers/video/bridge/Kconfig" |
Masahiro Yamada | cc85b7b | 2015-07-26 02:46:26 +0900 | [diff] [blame] | 259 | |
| 260 | endmenu |