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git01.mediatek.com / filogic / uboot / df8d8b8aed9761e713a3e40f75534fdb6a90114f / . / arch / arm / dts / exynos54xx.dtsi
blob: be99a82d5f75360188983ddf8776f0feec57f928 [file] [log] [blame]
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]1/*
2 * (C) Copyright 2013 SAMSUNG Electronics
3 * SAMSUNG EXYNOS5420 SoC device tree source
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
Simon Glass78cefc02014-10-20 19:48:29 -0600[diff] [blame]8#include "exynos5.dtsi"
Simon Glass89e58382014-10-20 19:48:32 -0600[diff] [blame]9#include "exynos54xx-pinctrl.dtsi"
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]10
11/ {
12 config {
13 machine-arch-id = <4151>;
14 };
15
16 aliases {
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]17 i2c0 = "/i2c@12C60000";
18 i2c1 = "/i2c@12C70000";
19 i2c2 = "/i2c@12C80000";
20 i2c3 = "/i2c@12C90000";
21 i2c4 = "/i2c@12CA0000";
22 i2c5 = "/i2c@12CB0000";
23 i2c6 = "/i2c@12CC0000";
24 i2c7 = "/i2c@12CD0000";
25 i2c8 = "/i2c@12E00000";
26 i2c9 = "/i2c@12E10000";
27 i2c10 = "/i2c@12E20000";
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]28 pinctrl0 = &pinctrl_0;
29 pinctrl1 = &pinctrl_1;
30 pinctrl2 = &pinctrl_2;
31 pinctrl3 = &pinctrl_3;
32 pinctrl4 = &pinctrl_4;
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]33 spi0 = "/spi@12d20000";
34 spi1 = "/spi@12d30000";
35 spi2 = "/spi@12d40000";
36 spi3 = "/spi@131a0000";
37 spi4 = "/spi@131b0000";
38 mmc0 = "/mmc@12200000";
39 mmc1 = "/mmc@12210000";
40 mmc2 = "/mmc@12220000";
41 xhci0 = "/xhci@12000000";
42 xhci1 = "/xhci@12400000";
43 };
44
Przemyslaw Marczak91c25472015-10-27 13:08:03 +0100[diff] [blame]45 adc@12D10000 {
46 compatible = "samsung,exynos-adc-v2";
47 reg = <0x12D10000 0x100>;
48 interrupts = <0 106 0>;
49 status = "disabled";
50 };
51
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]52 i2c@12CA0000 {
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]53 #address-cells = <1>;
54 #size-cells = <0>;
55 compatible = "samsung,exynos5-hsi2c";
56 reg = <0x12CA0000 0x100>;
57 interrupts = <0 60 0>;
58 };
59
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]60 i2c@12CB0000 {
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]61 #address-cells = <1>;
62 #size-cells = <0>;
63 compatible = "samsung,exynos5-hsi2c";
64 reg = <0x12CB0000 0x100>;
65 interrupts = <0 61 0>;
66 };
67
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]68 i2c@12CC0000 {
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]69 #address-cells = <1>;
70 #size-cells = <0>;
71 compatible = "samsung,exynos5-hsi2c";
72 reg = <0x12CC0000 0x100>;
73 interrupts = <0 62 0>;
74 };
75
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]76 i2c@12CD0000 {
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]77 #address-cells = <1>;
78 #size-cells = <0>;
79 compatible = "samsung,exynos5-hsi2c";
80 reg = <0x12CD0000 0x100>;
81 interrupts = <0 63 0>;
82 };
83
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]84 i2c@12E00000 {
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]85 #address-cells = <1>;
86 #size-cells = <0>;
87 compatible = "samsung,exynos5-hsi2c";
88 reg = <0x12E00000 0x100>;
89 interrupts = <0 87 0>;
90 };
91
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]92 i2c@12E10000 {
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]93 #address-cells = <1>;
94 #size-cells = <0>;
95 compatible = "samsung,exynos5-hsi2c";
96 reg = <0x12E10000 0x100>;
97 interrupts = <0 88 0>;
98 };
99
Simon Glass2a61b442015-07-02 18:15:48 -0600[diff] [blame]100 i2c@12E20000 {
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]101 #address-cells = <1>;
102 #size-cells = <0>;
103 compatible = "samsung,exynos5-hsi2c";
104 reg = <0x12E20000 0x100>;
105 interrupts = <0 203 0>;
106 };
107
108 mmc@12200000 {
109 samsung,bus-width = <8>;
110 samsung,timing = <1 3 3>;
111 samsung,removable = <0>;
112 samsung,pre-init;
113 };
114
115 mmc@12210000 {
116 status = "disabled";
117 };
118
119 mmc@12220000 {
120 samsung,bus-width = <4>;
121 samsung,timing = <1 2 3>;
122 samsung,removable = <1>;
123 };
124
125 mmc@12230000 {
126 status = "disabled";
127 };
128
Ajay Kumare24c5022014-09-05 16:53:33 +0530[diff] [blame]129 fimdm0_sysmmu@0x14640000 {
130 compatible = "samsung,sysmmu-v3.3";
131 reg = <0x14640000 0x100>;
132 };
133
134 fimdm1_sysmmu@0x14680000 {
135 compatible = "samsung,sysmmu-v3.3";
136 reg = <0x14680000 0x100>;
137 };
138
Simon Glass144cb552014-10-20 19:48:30 -0600[diff] [blame]139 pinctrl_0: pinctrl@13400000 {
140 compatible = "samsung,exynos5420-pinctrl";
141 reg = <0x13400000 0x1000>;
142 interrupts = <0 45 0>;
143
144 wakeup-interrupt-controller {
145 compatible = "samsung,exynos4210-wakeup-eint";
146 interrupt-parent = <&gic>;
147 interrupts = <0 32 0>;
148 };
149 };
150
151 pinctrl_1: pinctrl@13410000 {
152 compatible = "samsung,exynos5420-pinctrl";
153 reg = <0x13410000 0x1000>;
154 interrupts = <0 78 0>;
155 };
156
157 pinctrl_2: pinctrl@14000000 {
158 compatible = "samsung,exynos5420-pinctrl";
159 reg = <0x14000000 0x1000>;
160 interrupts = <0 46 0>;
161 };
162
163 pinctrl_3: pinctrl@14010000 {
164 compatible = "samsung,exynos5420-pinctrl";
165 reg = <0x14010000 0x1000>;
166 interrupts = <0 50 0>;
167 };
168
169 pinctrl_4: pinctrl@03860000 {
170 compatible = "samsung,exynos5420-pinctrl";
171 reg = <0x03860000 0x1000>;
172 interrupts = <0 47 0>;
173 };
174
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]175 fimd@14400000 {
176 /* sysmmu is not used in U-Boot */
177 samsung,disable-sysmmu;
Ajay Kumarb8441ae2015-03-04 19:05:28 +0530[diff] [blame]178 samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]179 };
180
181 dp@145b0000 {
182 samsung,lt-status = <0>;
183
184 samsung,master-mode = <0>;
185 samsung,bist-mode = <0>;
186 samsung,bist-pattern = <0>;
187 samsung,h-sync-polarity = <0>;
188 samsung,v-sync-polarity = <0>;
189 samsung,interlaced = <0>;
190 samsung,color-space = <0>;
191 samsung,dynamic-range = <0>;
192 samsung,ycbcr-coeff = <0>;
193 samsung,color-depth = <1>;
194 };
195
196 dmc {
197 mem-type = "ddr3";
198 };
199
Simon Glassdf8d8b82016-02-21 21:08:51 -0700[diff] [blame^]200 pwm: pwm@12dd0000 {
201 compatible = "samsung,exynos4210-pwm";
202 reg = <0x12dd0000 0x100>;
203 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
204 #pwm-cells = <3>;
205 };
206
Akshay Saraswatfdd9df32014-06-18 17:53:58 +0530[diff] [blame]207 xhci1: xhci@12400000 {
208 compatible = "samsung,exynos5250-xhci";
209 reg = <0x12400000 0x10000>;
210 #address-cells = <1>;
211 #size-cells = <1>;
212
213 phy {
214 compatible = "samsung,exynos5250-usb3-phy";
215 reg = <0x12500000 0x100>;
216 };
217 };
218};