blob: 39a5121e3028ce5c2b4fef9923672b0138476716 [file] [log] [blame]
Simon Glassc036ebd2021-02-06 14:23:35 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 Google LLC
4 */
5
Simon Glassc036ebd2021-02-06 14:23:35 -07006#include <dm.h>
7#include <log.h>
8#include <tpm_api.h>
9#include <tpm-v1.h>
10#include <tpm-v2.h>
11#include <tpm_api.h>
12
Simon Glassc036ebd2021-02-06 14:23:35 -070013u32 tpm_startup(struct udevice *dev, enum tpm_startup_type mode)
14{
Simon Glass8f2ecaf2022-07-22 21:32:02 +053015 if (tpm_is_v1(dev)) {
Simon Glassc036ebd2021-02-06 14:23:35 -070016 return tpm1_startup(dev, mode);
Simon Glass8f2ecaf2022-07-22 21:32:02 +053017 } else if (tpm_is_v2(dev)) {
Simon Glass1f1eb342021-02-06 14:23:37 -070018 enum tpm2_startup_types type;
19
20 switch (mode) {
21 case TPM_ST_CLEAR:
22 type = TPM2_SU_CLEAR;
23 break;
24 case TPM_ST_STATE:
25 type = TPM2_SU_STATE;
26 break;
27 default:
28 case TPM_ST_DEACTIVATED:
29 return -EINVAL;
30 }
31 return tpm2_startup(dev, type);
32 } else {
Simon Glassc036ebd2021-02-06 14:23:35 -070033 return -ENOSYS;
Simon Glass1f1eb342021-02-06 14:23:37 -070034 }
Simon Glassc036ebd2021-02-06 14:23:35 -070035}
36
Ilias Apalodimas42d7bdf2023-01-25 12:18:36 +020037u32 tpm_auto_start(struct udevice *dev)
38{
Simon Glass3467ed22023-02-21 06:24:52 -070039 u32 rc;
Ilias Apalodimas42d7bdf2023-01-25 12:18:36 +020040
Simon Glass3467ed22023-02-21 06:24:52 -070041 /*
42 * the tpm_init() will return -EBUSY if the init has already happened
43 * The selftest and startup code can run multiple times with no side
44 * effects
45 */
46 rc = tpm_init(dev);
47 if (rc && rc != -EBUSY)
48 return rc;
49
50 if (tpm_is_v1(dev))
51 return tpm1_auto_start(dev);
52 else if (tpm_is_v2(dev))
53 return tpm2_auto_start(dev);
54 else
55 return -ENOSYS;
Ilias Apalodimas42d7bdf2023-01-25 12:18:36 +020056}
57
Simon Glassc036ebd2021-02-06 14:23:35 -070058u32 tpm_resume(struct udevice *dev)
59{
Simon Glass8f2ecaf2022-07-22 21:32:02 +053060 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -070061 return tpm1_startup(dev, TPM_ST_STATE);
Simon Glass8f2ecaf2022-07-22 21:32:02 +053062 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -070063 return tpm2_startup(dev, TPM2_SU_STATE);
Simon Glassc036ebd2021-02-06 14:23:35 -070064 else
65 return -ENOSYS;
66}
67
68u32 tpm_self_test_full(struct udevice *dev)
69{
Simon Glass8f2ecaf2022-07-22 21:32:02 +053070 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -070071 return tpm1_self_test_full(dev);
Simon Glass8f2ecaf2022-07-22 21:32:02 +053072 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -070073 return tpm2_self_test(dev, TPMI_YES);
Simon Glassc036ebd2021-02-06 14:23:35 -070074 else
75 return -ENOSYS;
76}
77
78u32 tpm_continue_self_test(struct udevice *dev)
79{
Simon Glass8f2ecaf2022-07-22 21:32:02 +053080 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -070081 return tpm1_continue_self_test(dev);
Simon Glass8f2ecaf2022-07-22 21:32:02 +053082 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -070083 return tpm2_self_test(dev, TPMI_NO);
Simon Glassc036ebd2021-02-06 14:23:35 -070084 else
85 return -ENOSYS;
86}
87
88u32 tpm_clear_and_reenable(struct udevice *dev)
89{
90 u32 ret;
91
92 log_info("TPM: Clear and re-enable\n");
93 ret = tpm_force_clear(dev);
94 if (ret != TPM_SUCCESS) {
95 log_err("Can't initiate a force clear\n");
96 return ret;
97 }
98
Simon Glass8f2ecaf2022-07-22 21:32:02 +053099 if (tpm_is_v1(dev)) {
Simon Glassc036ebd2021-02-06 14:23:35 -0700100 ret = tpm1_physical_enable(dev);
101 if (ret != TPM_SUCCESS) {
102 log_err("TPM: Can't set enabled state\n");
103 return ret;
104 }
105
106 ret = tpm1_physical_set_deactivated(dev, 0);
107 if (ret != TPM_SUCCESS) {
108 log_err("TPM: Can't set deactivated state\n");
109 return ret;
110 }
Simon Glassc036ebd2021-02-06 14:23:35 -0700111 }
112
113 return TPM_SUCCESS;
114}
115
116u32 tpm_nv_enable_locking(struct udevice *dev)
117{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530118 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700119 return tpm1_nv_define_space(dev, TPM_NV_INDEX_LOCK, 0, 0);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530120 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700121 return -ENOSYS;
Simon Glassc036ebd2021-02-06 14:23:35 -0700122 else
123 return -ENOSYS;
124}
125
126u32 tpm_nv_read_value(struct udevice *dev, u32 index, void *data, u32 count)
127{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530128 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700129 return tpm1_nv_read_value(dev, index, data, count);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530130 else if (tpm_is_v2(dev))
Simon Glass3d930ed2021-02-06 14:23:40 -0700131 return tpm2_nv_read_value(dev, index, data, count);
Simon Glassc036ebd2021-02-06 14:23:35 -0700132 else
133 return -ENOSYS;
134}
135
136u32 tpm_nv_write_value(struct udevice *dev, u32 index, const void *data,
137 u32 count)
138{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530139 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700140 return tpm1_nv_write_value(dev, index, data, count);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530141 else if (tpm_is_v2(dev))
Simon Glass3d930ed2021-02-06 14:23:40 -0700142 return tpm2_nv_write_value(dev, index, data, count);
Simon Glassc036ebd2021-02-06 14:23:35 -0700143 else
144 return -ENOSYS;
145}
146
147u32 tpm_set_global_lock(struct udevice *dev)
148{
149 return tpm_nv_write_value(dev, TPM_NV_INDEX_0, NULL, 0);
150}
151
152u32 tpm_write_lock(struct udevice *dev, u32 index)
153{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530154 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700155 return -ENOSYS;
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530156 else if (tpm_is_v2(dev))
Simon Glasse9d3d592021-02-06 14:23:41 -0700157 return tpm2_write_lock(dev, index);
Simon Glassc036ebd2021-02-06 14:23:35 -0700158 else
159 return -ENOSYS;
160}
161
162u32 tpm_pcr_extend(struct udevice *dev, u32 index, const void *in_digest,
Simon Glass4927f472022-08-30 21:05:32 -0600163 uint size, void *out_digest, const char *name)
Simon Glassc036ebd2021-02-06 14:23:35 -0700164{
Simon Glass4927f472022-08-30 21:05:32 -0600165 if (tpm_is_v1(dev)) {
Simon Glassc036ebd2021-02-06 14:23:35 -0700166 return tpm1_extend(dev, index, in_digest, out_digest);
Simon Glass4927f472022-08-30 21:05:32 -0600167 } else if (tpm_is_v2(dev)) {
Simon Glass1f1eb342021-02-06 14:23:37 -0700168 return tpm2_pcr_extend(dev, index, TPM2_ALG_SHA256, in_digest,
169 TPM2_DIGEST_LEN);
Simon Glass4927f472022-08-30 21:05:32 -0600170 /* @name is ignored as we do not support the TPM log here */
171 } else {
Simon Glassc036ebd2021-02-06 14:23:35 -0700172 return -ENOSYS;
Simon Glass4927f472022-08-30 21:05:32 -0600173 }
Simon Glassc036ebd2021-02-06 14:23:35 -0700174}
175
176u32 tpm_pcr_read(struct udevice *dev, u32 index, void *data, size_t count)
177{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530178 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700179 return tpm1_pcr_read(dev, index, data, count);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530180 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700181 return -ENOSYS;
Simon Glassc036ebd2021-02-06 14:23:35 -0700182 else
183 return -ENOSYS;
184}
185
186u32 tpm_tsc_physical_presence(struct udevice *dev, u16 presence)
187{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530188 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700189 return tpm1_tsc_physical_presence(dev, presence);
Simon Glass1f1eb342021-02-06 14:23:37 -0700190
191 /*
192 * Nothing to do on TPM2 for this; use platform hierarchy availability
193 * instead.
194 */
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530195 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700196 return 0;
Simon Glassc036ebd2021-02-06 14:23:35 -0700197 else
198 return -ENOSYS;
199}
200
201u32 tpm_finalise_physical_presence(struct udevice *dev)
202{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530203 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700204 return tpm1_finalise_physical_presence(dev);
Simon Glass1f1eb342021-02-06 14:23:37 -0700205
206 /* Nothing needs to be done with tpm2 */
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530207 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700208 return 0;
Simon Glassc036ebd2021-02-06 14:23:35 -0700209 else
210 return -ENOSYS;
211}
212
213u32 tpm_read_pubek(struct udevice *dev, void *data, size_t count)
214{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530215 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700216 return tpm1_read_pubek(dev, data, count);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530217 else if (tpm_is_v2(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700218 return -ENOSYS; /* not implemented yet */
Simon Glass1f1eb342021-02-06 14:23:37 -0700219 else
220 return -ENOSYS;
Simon Glassc036ebd2021-02-06 14:23:35 -0700221}
222
223u32 tpm_force_clear(struct udevice *dev)
224{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530225 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700226 return tpm1_force_clear(dev);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530227 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700228 return tpm2_clear(dev, TPM2_RH_PLATFORM, NULL, 0);
Simon Glassc036ebd2021-02-06 14:23:35 -0700229 else
230 return -ENOSYS;
231}
232
233u32 tpm_physical_enable(struct udevice *dev)
234{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530235 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700236 return tpm1_physical_enable(dev);
Simon Glass1f1eb342021-02-06 14:23:37 -0700237
238 /* Nothing needs to be done with tpm2 */
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530239 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700240 return 0;
Simon Glassc036ebd2021-02-06 14:23:35 -0700241 else
242 return -ENOSYS;
243}
244
245u32 tpm_physical_disable(struct udevice *dev)
246{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530247 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700248 return tpm1_physical_disable(dev);
Simon Glass1f1eb342021-02-06 14:23:37 -0700249
250 /* Nothing needs to be done with tpm2 */
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530251 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700252 return 0;
Simon Glassc036ebd2021-02-06 14:23:35 -0700253 else
254 return -ENOSYS;
255}
256
257u32 tpm_physical_set_deactivated(struct udevice *dev, u8 state)
258{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530259 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700260 return tpm1_physical_set_deactivated(dev, state);
Simon Glass1f1eb342021-02-06 14:23:37 -0700261 /* Nothing needs to be done with tpm2 */
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530262 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700263 return 0;
Simon Glassc036ebd2021-02-06 14:23:35 -0700264 else
265 return -ENOSYS;
266}
267
268u32 tpm_get_capability(struct udevice *dev, u32 cap_area, u32 sub_cap,
269 void *cap, size_t count)
270{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530271 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700272 return tpm1_get_capability(dev, cap_area, sub_cap, cap, count);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530273 else if (tpm_is_v2(dev))
Simon Glass1f1eb342021-02-06 14:23:37 -0700274 return tpm2_get_capability(dev, cap_area, sub_cap, cap, count);
Simon Glassc036ebd2021-02-06 14:23:35 -0700275 else
276 return -ENOSYS;
277}
278
279u32 tpm_get_permissions(struct udevice *dev, u32 index, u32 *perm)
280{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530281 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700282 return tpm1_get_permissions(dev, index, perm);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530283 else if (tpm_is_v2(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700284 return -ENOSYS; /* not implemented yet */
Simon Glass1f1eb342021-02-06 14:23:37 -0700285 else
286 return -ENOSYS;
Simon Glassc036ebd2021-02-06 14:23:35 -0700287}
288
289u32 tpm_get_random(struct udevice *dev, void *data, u32 count)
290{
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530291 if (tpm_is_v1(dev))
Simon Glassc036ebd2021-02-06 14:23:35 -0700292 return tpm1_get_random(dev, data, count);
Simon Glass8f2ecaf2022-07-22 21:32:02 +0530293 else if (tpm_is_v2(dev))
Sughosh Ganu9737fab2022-07-22 21:32:04 +0530294 return tpm2_get_random(dev, data, count);
295
296 return -ENOSYS;
Simon Glassc036ebd2021-02-06 14:23:35 -0700297}