Marek Vasut | dd47718 | 2024-10-26 00:55:05 +0200 | [diff] [blame] | 1 | #include <configs/imx_dhsom.config> |
| 2 | |
| 3 | CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y |
| 4 | # CONFIG_INPUT is not set |
| 5 | CONFIG_ARCH_MISC_INIT=y |
| 6 | CONFIG_BOARD_LATE_INIT=y |
| 7 | CONFIG_BOOTCOMMAND="run dh_update_env distro_bootcmd ; reset" |
| 8 | CONFIG_NR_DRAM_BANKS=2 |
| 9 | CONFIG_OF_SYSTEM_SETUP=y |
| 10 | CONFIG_SUPPORT_RAW_INITRD=y |
| 11 | CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 |
| 12 | CONFIG_SYS_BOOTM_LEN=0x8000000 |
| 13 | CONFIG_SYS_CBSIZE=2048 |
| 14 | CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y |
| 15 | CONFIG_SYS_LOAD_ADDR=0x50000000 |
| 16 | CONFIG_SYS_MALLOC_F_LEN=0x18000 |
| 17 | CONFIG_SYS_MALLOC_LEN=0x1000000 |
| 18 | CONFIG_SYS_MONITOR_LEN=1048576 |
| 19 | CONFIG_SYS_PBSIZE=2081 |
| 20 | CONFIG_TEXT_BASE=0x40200000 |
| 21 | CONFIG_USE_BOOTARGS=y |
| 22 | CONFIG_USE_BOOTCOMMAND=y |
| 23 | CONFIG_USE_PREBOOT=y |
| 24 | |
| 25 | # CONFIG_SPL_FIT_IMAGE_TINY is not set |
| 26 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 27 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 28 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 |
| 29 | CONFIG_SPL_BOARD_INIT=y |
| 30 | CONFIG_SPL_BOOTROM_SUPPORT=y |
| 31 | CONFIG_SPL_BSS_MAX_SIZE=0x400 |
| 32 | CONFIG_SPL_BSS_START_ADDR=0x96fc00 |
| 33 | CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x4c000000 |
| 34 | CONFIG_SPL_DM=y |
| 35 | CONFIG_SPL_DRIVERS_MISC=y |
| 36 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 37 | CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y |
| 38 | CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 |
| 39 | CONFIG_SPL_LOAD_FIT=y |
| 40 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 |
| 41 | CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY=y |
| 42 | CONFIG_SPL_MAX_SIZE=0x26000 |
| 43 | CONFIG_SPL_OF_CONTROL=y |
| 44 | CONFIG_SPL_STACK=0x96fc00 |
| 45 | CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 |
| 46 | CONFIG_SPL_TEXT_BASE=0x920000 |
| 47 | |
| 48 | CONFIG_CONSOLE_MUX=y |
| 49 | CONFIG_CONS_INDEX=2 |
| 50 | CONFIG_DEBUG_UART=y |
| 51 | CONFIG_DEBUG_UART_BASE=0x30860000 |
| 52 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 53 | |
| 54 | CONFIG_CMD_EEPROM=y |
| 55 | CONFIG_CMD_SMC=y |
| 56 | CONFIG_SPL_I2C=y |
| 57 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 |
| 58 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=20 |
| 59 | CONFIG_SYS_EEPROM_SIZE=16384 |
| 60 | CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 |
| 61 | |
| 62 | CONFIG_ENV_OFFSET=0xFE0000 |
| 63 | CONFIG_ENV_OFFSET_REDUND=0xFF0000 |
| 64 | CONFIG_ENV_SECT_SIZE=0x1000 |
| 65 | CONFIG_ENV_SIZE=0x10000 |
| 66 | CONFIG_ENV_SPI_MAX_HZ=80000000 |
| 67 | CONFIG_ENV_VARS_UBOOT_CONFIG=y |
| 68 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
| 69 | CONFIG_NXP_FSPI=y |
| 70 | CONFIG_SF_DEFAULT_SPEED=50000000 |
| 71 | # CONFIG_SPI_FLASH_UNLOCK_ALL is not set |
| 72 | |
| 73 | CONFIG_BOOTCOUNT_LIMIT=y |
| 74 | CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000 |
| 75 | |
| 76 | CONFIG_CLK_COMPOSITE_CCF=y |
| 77 | CONFIG_CLK_IMX8MP=y |
| 78 | CONFIG_SPL_CLK_COMPOSITE_CCF=y |
| 79 | CONFIG_SPL_CLK_IMX8MP=y |
| 80 | |
| 81 | CONFIG_FSL_CAAM=y |
| 82 | |
| 83 | CONFIG_IMX8M_DRAM_INLINE_ECC=y |
| 84 | |
| 85 | CONFIG_IMX_BOOTAUX=y |
| 86 | |
| 87 | CONFIG_DM_PCA953X=y |
| 88 | CONFIG_SPL_GPIO_HOG=y |
| 89 | |
| 90 | CONFIG_DM_ETH_PHY=y |
| 91 | CONFIG_DM_MDIO=y |
| 92 | CONFIG_DWC_ETH_QOS=y |
| 93 | CONFIG_DWC_ETH_QOS_IMX=y |
| 94 | CONFIG_PHY_SMSC=y |
| 95 | CONFIG_RGMII=y |
| 96 | |
| 97 | CONFIG_MMC_HS400_ES_SUPPORT=y |
| 98 | CONFIG_MMC_HS400_SUPPORT=y |
| 99 | CONFIG_MMC_UHS_SUPPORT=y |
| 100 | CONFIG_MMC_IO_VOLTAGE=y |
| 101 | CONFIG_MMC_SPEED_MODE_SET=y |
| 102 | CONFIG_SPL_MMC_IO_VOLTAGE=y |
| 103 | CONFIG_SPL_MMC_UHS_SUPPORT=y |
| 104 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
| 105 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 |
| 106 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
| 107 | |
| 108 | CONFIG_DM_PMIC=y |
| 109 | CONFIG_DM_PMIC_PCA9450=y |
| 110 | CONFIG_DM_REGULATOR_GPIO=y |
| 111 | CONFIG_DM_REGULATOR_PCA9450=y |
| 112 | CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y |
| 113 | CONFIG_IMX8M_POWER_DOMAIN=y |
| 114 | CONFIG_POWER_DOMAIN=y |
| 115 | CONFIG_SPL_DM_PMIC_PCA9450=y |
| 116 | CONFIG_SPL_DM_REGULATOR=y |
| 117 | CONFIG_SPL_DM_REGULATOR_PCA9450=y |
| 118 | CONFIG_SPL_POWER=y |
| 119 | |
| 120 | CONFIG_PINCTRL_IMX8M=y |
| 121 | CONFIG_SPL_PINCTRL=y |
| 122 | |
| 123 | CONFIG_CMD_SPI=y |
| 124 | CONFIG_DM_MTD=y |
| 125 | |
| 126 | CONFIG_DM_RESET=y |
| 127 | CONFIG_SPL_SYSRESET=y |
| 128 | CONFIG_SYSRESET_PSCI=y |
| 129 | |
| 130 | CONFIG_DM_RNG=y |
| 131 | |
| 132 | CONFIG_CMD_GETTIME=y |
| 133 | CONFIG_CMD_TIME=y |
| 134 | CONFIG_DM_RTC=y |
| 135 | CONFIG_RTC_M41T62=y |
| 136 | |
| 137 | CONFIG_CMD_USB_SDP=y |
| 138 | CONFIG_DM_USB_GADGET=y |
| 139 | CONFIG_FASTBOOT_BUF_ADDR=0x42800000 |
| 140 | CONFIG_FASTBOOT_BUF_SIZE=0x20000000 |
| 141 | CONFIG_FASTBOOT_FLASH=y |
| 142 | CONFIG_FASTBOOT_FLASH_MMC_DEV=0 |
| 143 | CONFIG_PHY_IMX8MQ_USB=y |
| 144 | CONFIG_USB_DWC3=y |
| 145 | CONFIG_USB_DWC3_GENERIC=y |
| 146 | CONFIG_USB_ETHER=y |
| 147 | CONFIG_USB_ETH_CDC=y |
| 148 | CONFIG_USB_FUNCTION_ACM=y |
| 149 | CONFIG_USB_FUNCTION_FASTBOOT=y |
| 150 | CONFIG_USB_XHCI_DWC3=y |
| 151 | CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y |
| 152 | CONFIG_USB_XHCI_HCD=y |
| 153 | |
| 154 | CONFIG_DFU_MMC=y |
| 155 | CONFIG_DFU_MTD=y |
| 156 | CONFIG_DFU_RAM=y |
| 157 | CONFIG_DFU_TFTP=y |
| 158 | CONFIG_DFU_TIMEOUT=y |