Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2000-2002 |
| 4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 5 | * |
| 6 | * (C) Copyright 2004, Psyent Corporation <www.psyent.com> |
| 7 | * Scott McNutt <smcnutt@psyent.com> |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 8 | */ |
| 9 | |
Thomas Chou | 4e1acb7 | 2015-10-03 21:02:30 +0800 | [diff] [blame] | 10 | #include <command.h> |
Simon Glass | 9b61c7c | 2019-11-14 12:57:41 -0700 | [diff] [blame] | 11 | #include <irq_func.h> |
Thomas Chou | 0f9763f | 2014-08-25 17:09:07 +0800 | [diff] [blame] | 12 | #include <asm/nios2.h> |
Stefan Roese | 3762825 | 2008-08-06 14:05:38 +0200 | [diff] [blame] | 13 | #include <asm/types.h> |
Scott McNutt | a5721a3 | 2006-06-08 11:59:57 -0400 | [diff] [blame] | 14 | #include <asm/io.h> |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 15 | #include <asm/ptrace.h> |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 16 | |
Thomas Chou | 16dc04b | 2015-10-08 21:23:37 +0800 | [diff] [blame] | 17 | /*************************************************************************/ |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 18 | struct irq_action { |
| 19 | interrupt_handler_t *handler; |
| 20 | void *arg; |
| 21 | int count; |
| 22 | }; |
| 23 | |
| 24 | static struct irq_action vecs[32]; |
| 25 | |
Simon Glass | f87959b | 2019-11-14 12:57:40 -0700 | [diff] [blame] | 26 | int disable_interrupts(void) |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 27 | { |
| 28 | int val = rdctl (CTL_STATUS); |
| 29 | wrctl (CTL_STATUS, val & ~STATUS_IE); |
| 30 | return (val & STATUS_IE); |
| 31 | } |
| 32 | |
| 33 | void enable_interrupts( void ) |
| 34 | { |
| 35 | int val = rdctl (CTL_STATUS); |
| 36 | wrctl (CTL_STATUS, val | STATUS_IE); |
| 37 | } |
| 38 | |
Simon Glass | f87959b | 2019-11-14 12:57:40 -0700 | [diff] [blame] | 39 | void external_interrupt(struct pt_regs *regs) |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 40 | { |
| 41 | unsigned irqs; |
| 42 | struct irq_action *act; |
| 43 | |
| 44 | /* Evaluate only irqs that are both enabled AND pending */ |
| 45 | irqs = rdctl (CTL_IENABLE) & rdctl (CTL_IPENDING); |
| 46 | act = vecs; |
| 47 | |
| 48 | /* Assume (as does the Nios2 HAL) that bit 0 is highest |
| 49 | * priority. NOTE: There is ALWAYS a handler assigned |
| 50 | * (the default if no other). |
| 51 | */ |
| 52 | while (irqs) { |
| 53 | if (irqs & 1) { |
| 54 | act->handler (act->arg); |
| 55 | act->count++; |
| 56 | } |
| 57 | irqs >>=1; |
| 58 | act++; |
| 59 | } |
| 60 | } |
| 61 | |
| 62 | static void def_hdlr (void *arg) |
| 63 | { |
| 64 | unsigned irqs = rdctl (CTL_IENABLE); |
| 65 | |
| 66 | /* Disable the individual interrupt -- with gratuitous |
| 67 | * warning. |
| 68 | */ |
| 69 | irqs &= ~(1 << (int)arg); |
| 70 | wrctl (CTL_IENABLE, irqs); |
| 71 | printf ("WARNING: Disabling unhandled interrupt: %d\n", |
| 72 | (int)arg); |
| 73 | } |
| 74 | |
| 75 | /*************************************************************************/ |
Simon Glass | f87959b | 2019-11-14 12:57:40 -0700 | [diff] [blame] | 76 | void irq_install_handler(int irq, interrupt_handler_t *hdlr, void *arg) |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 77 | { |
| 78 | |
| 79 | int flag; |
| 80 | struct irq_action *act; |
| 81 | unsigned ena = rdctl (CTL_IENABLE); |
| 82 | |
| 83 | if ((irq < 0) || (irq > 31)) |
| 84 | return; |
| 85 | act = &vecs[irq]; |
| 86 | |
Simon Glass | f87959b | 2019-11-14 12:57:40 -0700 | [diff] [blame] | 87 | flag = disable_interrupts(); |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 88 | if (hdlr) { |
| 89 | act->handler = hdlr; |
| 90 | act->arg = arg; |
| 91 | ena |= (1 << irq); /* enable */ |
| 92 | } else { |
| 93 | act->handler = def_hdlr; |
| 94 | act->arg = (void *)irq; |
| 95 | ena &= ~(1 << irq); /* disable */ |
| 96 | } |
| 97 | wrctl (CTL_IENABLE, ena); |
Simon Glass | f87959b | 2019-11-14 12:57:40 -0700 | [diff] [blame] | 98 | if (flag) enable_interrupts(); |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 99 | } |
| 100 | |
Simon Glass | f87959b | 2019-11-14 12:57:40 -0700 | [diff] [blame] | 101 | int interrupt_init(void) |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 102 | { |
| 103 | int i; |
| 104 | |
| 105 | /* Assign the default handler to all */ |
| 106 | for (i = 0; i < 32; i++) { |
| 107 | vecs[i].handler = def_hdlr; |
| 108 | vecs[i].arg = (void *)i; |
| 109 | vecs[i].count = 0; |
| 110 | } |
| 111 | |
Simon Glass | f87959b | 2019-11-14 12:57:40 -0700 | [diff] [blame] | 112 | enable_interrupts(); |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 113 | return (0); |
| 114 | } |
| 115 | |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 116 | /*************************************************************************/ |
Jon Loeliger | a521774 | 2007-07-09 18:57:22 -0500 | [diff] [blame] | 117 | #if defined(CONFIG_CMD_IRQ) |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 118 | int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
wdenk | ef3386f | 2004-10-10 21:27:30 +0000 | [diff] [blame] | 119 | { |
| 120 | int i; |
| 121 | struct irq_action *act = vecs; |
| 122 | |
| 123 | printf ("\nInterrupt-Information:\n\n"); |
| 124 | printf ("Nr Routine Arg Count\n"); |
| 125 | printf ("-----------------------------\n"); |
| 126 | |
| 127 | for (i=0; i<32; i++) { |
| 128 | if (act->handler != def_hdlr) { |
| 129 | printf ("%02d %08lx %08lx %d\n", |
| 130 | i, |
| 131 | (ulong)act->handler, |
| 132 | (ulong)act->arg, |
| 133 | act->count); |
| 134 | } |
| 135 | act++; |
| 136 | } |
| 137 | printf ("\n"); |
| 138 | |
| 139 | return (0); |
| 140 | } |
Jon Loeliger | a521774 | 2007-07-09 18:57:22 -0500 | [diff] [blame] | 141 | #endif |