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git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / test / dm / irq.c
blob: d22772ab769331835e9dce4fa70e17269e056413 [file] [log] [blame]
Simon Glass54028bc2019-12-06 21:41:59 -0700[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Test for irq uclass
4 *
5 * Copyright 2019 Google LLC
6 */
7
Simon Glass54028bc2019-12-06 21:41:59 -0700[diff] [blame]8#include <dm.h>
9#include <irq.h>
Simon Glassb24cbf42020-07-07 13:11:41 -0600[diff] [blame]10#include <acpi/acpi_device.h>
Simon Glassa847b272020-02-06 09:54:57 -0700[diff] [blame]11#include <asm/test.h>
Simon Glass54028bc2019-12-06 21:41:59 -0700[diff] [blame]12#include <dm/test.h>
13#include <test/ut.h>
14
15/* Base test of the irq uclass */
16static int dm_test_irq_base(struct unit_test_state *uts)
17{
18 struct udevice *dev;
19
20 ut_assertok(uclass_first_device_err(UCLASS_IRQ, &dev));
21
22 ut_asserteq(5, irq_route_pmc_gpio_gpe(dev, 4));
23 ut_asserteq(-ENOENT, irq_route_pmc_gpio_gpe(dev, 14));
24
25 ut_assertok(irq_set_polarity(dev, 4, true));
26 ut_asserteq(-EINVAL, irq_set_polarity(dev, 14, true));
27
28 ut_assertok(irq_snapshot_polarities(dev));
29 ut_assertok(irq_restore_polarities(dev));
30
31 return 0;
32}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]33DM_TEST(dm_test_irq_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
Simon Glassa847b272020-02-06 09:54:57 -0700[diff] [blame]34
35/* Test of irq_first_device_type() */
36static int dm_test_irq_type(struct unit_test_state *uts)
37{
38 struct udevice *dev;
39
40 ut_assertok(irq_first_device_type(SANDBOX_IRQT_BASE, &dev));
41 ut_asserteq(-ENODEV, irq_first_device_type(X86_IRQT_BASE, &dev));
42
43 return 0;
44}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]45DM_TEST(dm_test_irq_type, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
Simon Glass515dcff2020-02-06 09:55:00 -0700[diff] [blame]46
47/* Test of irq_read_and_clear() */
48static int dm_test_read_and_clear(struct unit_test_state *uts)
49{
50 struct irq irq;
51
52 ut_assertok(irq_first_device_type(SANDBOX_IRQT_BASE, &irq.dev));
53 irq.id = SANDBOX_IRQN_PEND;
54 ut_asserteq(0, irq_read_and_clear(&irq));
55 ut_asserteq(0, irq_read_and_clear(&irq));
56 ut_asserteq(0, irq_read_and_clear(&irq));
57 ut_asserteq(1, irq_read_and_clear(&irq));
58 ut_asserteq(0, irq_read_and_clear(&irq));
59
60 return 0;
61}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]62DM_TEST(dm_test_read_and_clear, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
Simon Glass515dcff2020-02-06 09:55:00 -0700[diff] [blame]63
64/* Test of irq_request() */
65static int dm_test_request(struct unit_test_state *uts)
66{
67 struct udevice *dev;
68 struct irq irq;
69
70 ut_assertok(uclass_first_device_err(UCLASS_TEST_FDT, &dev));
71 ut_asserteq_str("a-test", dev->name);
72 ut_assertok(irq_get_by_index(dev, 0, &irq));
73 ut_asserteq(3, irq.id);
74
75 return 0;
76}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]77DM_TEST(dm_test_request, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
Simon Glassb24cbf42020-07-07 13:11:41 -0600[diff] [blame]78
79/* Test of irq_get_acpi() */
80static int dm_test_irq_get_acpi(struct unit_test_state *uts)
81{
82 struct acpi_irq airq;
83 struct udevice *dev;
84 struct irq irq;
85
86 ut_assertok(uclass_first_device_err(UCLASS_TEST_FDT, &dev));
87 ut_assertok(irq_get_by_index(dev, 0, &irq));
88
89 /* see sandbox_get_acpi() */
90 ut_assertok(irq_get_acpi(&irq, &airq));
91 ut_asserteq(3, airq.pin);
92 ut_asserteq(ACPI_IRQ_LEVEL_TRIGGERED, airq.mode);
93 ut_asserteq(ACPI_IRQ_ACTIVE_HIGH, airq.polarity);
94 ut_asserteq(ACPI_IRQ_SHARED, airq.shared);
95 ut_asserteq(ACPI_IRQ_WAKE, airq.wake);
96
97 return 0;
98}
Simon Glass974dccd2020-07-28 19:41:12 -0600[diff] [blame]99DM_TEST(dm_test_irq_get_acpi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);