| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | STMicroelectronics Low Power Controller (LPC) - Watchdog |
| 2 | ======================================================== |
| 3 | |
| 4 | LPC currently supports Watchdog OR Real Time Clock OR Clocksource |
| 5 | functionality. |
| 6 | |
| 7 | [See: ../rtc/rtc-st-lpc.txt for RTC options] |
| 8 | [See: ../timer/st,stih407-lpc for Clocksource options] |
| 9 | |
| 10 | Required properties |
| 11 | |
| 12 | - compatible : Should be: "st,stih407-lpc" |
| 13 | - reg : LPC registers base address + size |
| 14 | - interrupts : LPC interrupt line number and associated flags |
| 15 | - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt) |
| 16 | - st,lpc-mode : The LPC can run either one of three modes: |
| 17 | ST_LPC_MODE_RTC [0] |
| 18 | ST_LPC_MODE_WDT [1] |
| 19 | ST_LPC_MODE_CLKSRC [2] |
| 20 | One (and only one) mode must be selected. |
| 21 | |
| 22 | Required properties [watchdog mode] |
| 23 | |
| 24 | - st,syscfg : Phandle to syscfg node used to enable watchdog and configure |
| 25 | CPU reset type. |
| 26 | - timeout-sec : Watchdog timeout in seconds |
| 27 | |
| 28 | Optional properties [watchdog mode] |
| 29 | |
| 30 | - st,warm-reset : If present reset type will be 'warm' - if not it will be cold |
| 31 | |
| 32 | Example: |
| 33 | lpc@fde05000 { |
| 34 | compatible = "st,stih407-lpc"; |
| 35 | reg = <0xfde05000 0x1000>; |
| 36 | clocks = <&clk_s_d3_flexgen CLK_LPC_0>; |
| 37 | st,syscfg = <&syscfg_core>; |
| 38 | timeout-sec = <120>; |
| 39 | st,lpc-mode = <ST_LPC_MODE_WDT>; |
| 40 | st,warm-reset; |
| 41 | }; |