| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Samsung SoC series UFS host controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Alim Akhtar <alim.akhtar@samsung.com> |
| 11 | |
| 12 | description: | |
| 13 | Each Samsung UFS host controller instance should have its own node. |
| 14 | |
| 15 | allOf: |
| 16 | - $ref: ufs-common.yaml |
| 17 | |
| 18 | properties: |
| 19 | compatible: |
| 20 | enum: |
| 21 | - samsung,exynos7-ufs |
| 22 | - samsung,exynosautov9-ufs |
| 23 | - samsung,exynosautov9-ufs-vh |
| 24 | - tesla,fsd-ufs |
| 25 | |
| 26 | reg: |
| 27 | items: |
| 28 | - description: HCI register |
| 29 | - description: vendor specific register |
| 30 | - description: unipro register |
| 31 | - description: UFS protector register |
| 32 | |
| 33 | reg-names: |
| 34 | items: |
| 35 | - const: hci |
| 36 | - const: vs_hci |
| 37 | - const: unipro |
| 38 | - const: ufsp |
| 39 | |
| 40 | clocks: |
| 41 | items: |
| 42 | - description: ufs link core clock |
| 43 | - description: unipro main clock |
| 44 | |
| 45 | clock-names: |
| 46 | items: |
| 47 | - const: core_clk |
| 48 | - const: sclk_unipro_main |
| 49 | |
| 50 | phys: |
| 51 | maxItems: 1 |
| 52 | |
| 53 | phy-names: |
| 54 | const: ufs-phy |
| 55 | |
| 56 | samsung,sysreg: |
| 57 | $ref: /schemas/types.yaml#/definitions/phandle-array |
| Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 58 | items: |
| 59 | - items: |
| 60 | - description: phandle to FSYSx sysreg node |
| 61 | - description: offset of the control register for UFS io coherency setting |
| 62 | description: |
| 63 | Phandle and offset to the FSYSx sysreg for UFS io coherency setting. |
| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 64 | |
| 65 | dma-coherent: true |
| 66 | |
| 67 | required: |
| 68 | - compatible |
| 69 | - reg |
| 70 | - phys |
| 71 | - phy-names |
| 72 | - clocks |
| 73 | - clock-names |
| 74 | |
| 75 | unevaluatedProperties: false |
| 76 | |
| 77 | examples: |
| 78 | - | |
| 79 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 80 | #include <dt-bindings/clock/exynos7-clk.h> |
| 81 | |
| 82 | ufs: ufs@15570000 { |
| 83 | compatible = "samsung,exynos7-ufs"; |
| 84 | reg = <0x15570000 0x100>, |
| 85 | <0x15570100 0x100>, |
| 86 | <0x15571000 0x200>, |
| 87 | <0x15572000 0x300>; |
| 88 | reg-names = "hci", "vs_hci", "unipro", "ufsp"; |
| 89 | interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>; |
| 90 | clocks = <&clock_fsys1 ACLK_UFS20_LINK>, |
| 91 | <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; |
| 92 | clock-names = "core_clk", "sclk_unipro_main"; |
| 93 | pinctrl-names = "default"; |
| 94 | pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; |
| 95 | phys = <&ufs_phy>; |
| 96 | phy-names = "ufs-phy"; |
| 97 | }; |
| 98 | ... |