| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/timer/arm,twd-timer.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: ARM Timer-Watchdog Timer |
| 8 | |
| 9 | maintainers: |
| 10 | - Rob Herring <robh@kernel.org> |
| 11 | |
| 12 | description: |
| 13 | ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core |
| 14 | Timer-Watchdog (aka TWD), which provides both a per-cpu local timer |
| 15 | and watchdog. |
| 16 | |
| 17 | The TWD is usually attached to a GIC to deliver its two per-processor |
| 18 | interrupts. |
| 19 | |
| 20 | properties: |
| 21 | compatible: |
| 22 | enum: |
| 23 | - arm,cortex-a9-twd-timer |
| 24 | - arm,cortex-a5-twd-timer |
| 25 | - arm,arm11mp-twd-timer |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 1 |
| 29 | |
| 30 | interrupts: |
| 31 | maxItems: 1 |
| 32 | |
| 33 | clocks: |
| 34 | maxItems: 1 |
| 35 | |
| 36 | always-on: |
| 37 | description: |
| 38 | If present, the timer is powered through an always-on power domain, |
| 39 | therefore it never loses context. |
| 40 | |
| 41 | required: |
| 42 | - compatible |
| 43 | - reg |
| 44 | - interrupts |
| 45 | |
| 46 | additionalProperties: false |
| 47 | |
| 48 | examples: |
| 49 | - | |
| 50 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 51 | |
| 52 | timer@2c000600 { |
| 53 | compatible = "arm,arm11mp-twd-timer"; |
| 54 | reg = <0x2c000600 0x20>; |
| 55 | interrupts = <GIC_PPI 13 0xf01>; |
| 56 | }; |