Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Samsung SoC I2S controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Krzysztof Kozlowski <krzk@kernel.org> |
| 11 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 12 | |
| 13 | allOf: |
| 14 | - $ref: dai-common.yaml# |
| 15 | |
| 16 | properties: |
| 17 | compatible: |
| 18 | description: | |
| 19 | samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. |
| 20 | |
| 21 | samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with |
| 22 | secondary FIFO, s/w reset control and internal mux for root clock |
| 23 | source. |
| 24 | |
| 25 | samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for |
| 26 | playback, stereo channel capture, secondary FIFO using internal |
| 27 | or external DMA, s/w reset control, internal mux for root clock |
| 28 | source and 7.1 channel TDM support for playback; TDM (Time division |
| 29 | multiplexing) is to allow transfer of multiple channel audio data on |
| 30 | single data line. |
| 31 | |
| 32 | samsung,exynos7-i2s: with all the available features of Exynos5 I2S. |
| 33 | Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO |
| 34 | with only external DMA and more number of root clock sampling |
| 35 | frequencies. |
| 36 | |
| 37 | samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports |
| 38 | stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with |
| 39 | slightly modified bit offsets. |
| 40 | |
| 41 | tesla,fsd-i2s: for 8/16/24bit stereo channel I2S for playback and |
| 42 | capture, secondary FIFO using external DMA, s/w reset control, |
| 43 | internal mux for root clock source with all root clock sampling |
| 44 | frequencies supported by Exynos7 I2S and 7.1 channel TDM support |
| 45 | for playback and capture TDM (Time division multiplexing) to allow |
| 46 | transfer of multiple channel audio data on single data line. |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 47 | oneOf: |
| 48 | - enum: |
| 49 | - samsung,s3c6410-i2s |
| 50 | - samsung,s5pv210-i2s |
| 51 | - samsung,exynos5420-i2s |
| 52 | - samsung,exynos7-i2s |
| 53 | - samsung,exynos7-i2s1 |
| 54 | - tesla,fsd-i2s |
| 55 | - items: |
| 56 | - enum: |
| 57 | - samsung,exynos5433-i2s |
| 58 | - const: samsung,exynos7-i2s |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 59 | |
| 60 | '#address-cells': |
| 61 | const: 1 |
| 62 | |
| 63 | '#size-cells': |
| 64 | const: 0 |
| 65 | |
| 66 | reg: |
| 67 | maxItems: 1 |
| 68 | |
| 69 | dmas: |
| 70 | minItems: 2 |
| 71 | maxItems: 3 |
| 72 | |
| 73 | dma-names: |
| 74 | oneOf: |
| 75 | - items: |
| 76 | - const: tx |
| 77 | - const: rx |
| 78 | - items: |
| 79 | - const: tx |
| 80 | - const: rx |
| 81 | - const: tx-sec |
| 82 | |
| 83 | clocks: |
| 84 | minItems: 1 |
| 85 | maxItems: 3 |
| 86 | |
| 87 | clock-names: |
| 88 | oneOf: |
| 89 | - items: |
| 90 | - const: iis |
| 91 | - items: # for I2S0 |
| 92 | - const: iis |
| 93 | - const: i2s_opclk0 |
| 94 | - const: i2s_opclk1 |
| 95 | - items: # for I2S1 and I2S2 |
| 96 | - const: iis |
| 97 | - const: i2s_opclk0 |
| 98 | description: | |
| 99 | "iis" is the I2S bus clock and i2s_opclk0, i2s_opclk1 are sources |
| 100 | of the root clock. I2S0 has internal mux to select the source |
| 101 | of root clock and I2S1 and I2S2 doesn't have any such mux. |
| 102 | |
| 103 | "#clock-cells": |
| 104 | const: 1 |
| 105 | |
| 106 | clock-output-names: |
| 107 | deprecated: true |
| 108 | oneOf: |
| 109 | - items: # for I2S0 |
| 110 | - const: i2s_cdclk0 |
| 111 | - items: # for I2S1 |
| 112 | - const: i2s_cdclk1 |
| 113 | - items: # for I2S2 |
| 114 | - const: i2s_cdclk2 |
| 115 | description: Names of the CDCLK I2S output clocks. |
| 116 | |
| 117 | interrupts: |
| 118 | maxItems: 1 |
| 119 | |
| 120 | samsung,idma-addr: |
| 121 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 122 | description: | |
| 123 | Internal DMA register base address of the audio |
| 124 | subsystem (used in secondary sound source). |
| 125 | |
| 126 | power-domains: |
| 127 | maxItems: 1 |
| 128 | |
| 129 | "#sound-dai-cells": |
| 130 | const: 1 |
| 131 | |
| 132 | required: |
| 133 | - compatible |
| 134 | - reg |
| 135 | - dmas |
| 136 | - dma-names |
| 137 | - clocks |
| 138 | - clock-names |
| 139 | |
| 140 | unevaluatedProperties: false |
| 141 | |
| 142 | examples: |
| 143 | - | |
| 144 | #include <dt-bindings/clock/exynos-audss-clk.h> |
| 145 | |
| 146 | i2s0: i2s@3830000 { |
| 147 | compatible = "samsung,s5pv210-i2s"; |
| 148 | reg = <0x03830000 0x100>; |
| 149 | dmas = <&pdma0 10>, |
| 150 | <&pdma0 9>, |
| 151 | <&pdma0 8>; |
| 152 | dma-names = "tx", "rx", "tx-sec"; |
| 153 | clocks = <&clock_audss EXYNOS_I2S_BUS>, |
| 154 | <&clock_audss EXYNOS_I2S_BUS>, |
| 155 | <&clock_audss EXYNOS_SCLK_I2S>; |
| 156 | clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; |
| 157 | #clock-cells = <1>; |
| 158 | samsung,idma-addr = <0x03000000>; |
| 159 | pinctrl-names = "default"; |
| 160 | pinctrl-0 = <&i2s0_bus>; |
| 161 | #sound-dai-cells = <1>; |
| 162 | }; |